From 1ff4fb953820c823ae8d5035c75bf43bf85e9c3c Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Sat, 15 Aug 2026 04:23:23 +0800 Subject: [RISCV][GlobalISel] Legalize scalar bit count operations --- backend/lib/CodeGen/GenericOpcodes.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'backend/lib/CodeGen/GenericOpcodes.cpp') diff --git a/backend/lib/CodeGen/GenericOpcodes.cpp b/backend/lib/CodeGen/GenericOpcodes.cpp index ef51147..f45db39 100644 --- a/backend/lib/CodeGen/GenericOpcodes.cpp +++ b/backend/lib/CodeGen/GenericOpcodes.cpp @@ -1403,8 +1403,9 @@ void configureGenericOpcodes(DescriptorRegistry &Registry) { 1); Registry.configure({GO::G_CTTZ, GO::G_CTTZ_ZERO_POISON, GO::G_CTLZ, GO::G_CTLZ_ZERO_POISON, - GO::G_CTLS, GO::G_CTPOP, GO::G_BSWAP, GO::G_BITREVERSE}, - {IntDef0, IntUse0}, 1); + GO::G_CTLS, GO::G_CTPOP}, + {IntDef0, IntUse1}, 1); + Registry.configure({GO::G_BSWAP, GO::G_BITREVERSE}, {IntDef0, IntUse0}, 1); Registry.configure({GO::G_ADDRSPACE_CAST}, {PointerDef0, PointerUse1}, 1); Registry.configure({GO::G_BLOCK_ADDR}, {ScalarPointerDef0, kind(MachineOperand::Kind::BlockAddress)}, 1); -- cgit v1.2.3