From 77884c967d1cbc48afcbaef7e5a35adcb3c5da1b Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Sat, 8 Aug 2026 04:14:34 +0800 Subject: [CodeGen] Implement machine SSA exit --- backend/lib/CodeGen/InstructionDescriptor.cpp | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'backend/lib/CodeGen/InstructionDescriptor.cpp') diff --git a/backend/lib/CodeGen/InstructionDescriptor.cpp b/backend/lib/CodeGen/InstructionDescriptor.cpp index 57400d6..5aec744 100644 --- a/backend/lib/CodeGen/InstructionDescriptor.cpp +++ b/backend/lib/CodeGen/InstructionDescriptor.cpp @@ -420,11 +420,12 @@ Expected InstructionSet::validateExplicitOperands(const InstructionDescrip auto Info = RegInfo.virtualRegisterInfo(*Reg); if (!Info) return std::unexpected(Info.error()); - if (!Info->get().Type) { + const std::optional &RegisterType = Info->get().Type; + if (!RegisterType) { return makeUnexpected(ErrorCode::VerificationError, "typed instruction operand virtual register has no LLT"); } - const LLT Type = *Info->get().Type; + const LLT Type = RegisterType.value(); if (!OperandDesc.TypeConstraint->Kinds.contains(Type.kind())) { return makeUnexpected(ErrorCode::VerificationError, "instruction operand LLT kind is not permitted by its descriptor"); @@ -587,7 +588,8 @@ Expected InstructionSet::validateOperand(const OperandDescriptor &Descript return makeUnexpected(ErrorCode::VerificationError, "instruction operand kind does not match its descriptor"); } - if ((Operand.targetFlags() & ~Descriptor.AllowedTargetFlags) != 0) { + if (!Descriptor.AllowAnyTargetFlags && + (Operand.targetFlags() & ~Descriptor.AllowedTargetFlags) != 0) { return makeUnexpected(ErrorCode::VerificationError, "instruction operand uses unregistered target flags"); } -- cgit v1.2.3