From 924dcd36ebed84f04729de05ec08b311a36a04c1 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Sat, 1 Aug 2026 16:07:24 +0800 Subject: [CodeGen] Add target register descriptions Introduce an immutable register topology for units, subregisters, classes, banks, and preserved masks. Bind instruction descriptors to this topology through TargetDescription so builders, cloning, and verification share one target-aware contract. Add the test-only TestTarget model and positive and negative target fact coverage. --- backend/lib/CodeGen/InstructionDescriptor.cpp | 8 -------- 1 file changed, 8 deletions(-) (limited to 'backend/lib/CodeGen/InstructionDescriptor.cpp') diff --git a/backend/lib/CodeGen/InstructionDescriptor.cpp b/backend/lib/CodeGen/InstructionDescriptor.cpp index 9f4a178..3d97440 100644 --- a/backend/lib/CodeGen/InstructionDescriptor.cpp +++ b/backend/lib/CodeGen/InstructionDescriptor.cpp @@ -493,14 +493,6 @@ Expected InstructionSet::validateOperand(const OperandDescriptor &Descript auto Info = RegInfo.virtualRegisterInfo(*Reg); if (!Info) return std::unexpected(Info.error()); - if (Descriptor.RegBank && Info->get().Bank != Descriptor.RegBank) { - return makeUnexpected(ErrorCode::VerificationError, - "virtual register bank does not match operand descriptor"); - } - if (Descriptor.RegClass && Info->get().RegClass != Descriptor.RegClass) { - return makeUnexpected(ErrorCode::VerificationError, - "virtual register class does not match operand descriptor"); - } } } -- cgit v1.2.3