From c3932f55208e3fe2019d26a0e5af421c0b644872 Mon Sep 17 00:00:00 2001
From: Richard-Qin-X <richard.qin.001@gmail.com>
Date: Tue, 25 Aug 2026 02:38:56 +0800
Subject: [RISCV] Implement make-compressible pass

---
 backend/lib/CodeGen/MachineOperand.cpp | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'backend/lib/CodeGen/MachineOperand.cpp')

diff --git a/backend/lib/CodeGen/MachineOperand.cpp b/backend/lib/CodeGen/MachineOperand.cpp
index f265c3f..3994286 100644
--- a/backend/lib/CodeGen/MachineOperand.cpp
+++ b/backend/lib/CodeGen/MachineOperand.cpp
@@ -300,6 +300,11 @@ Expected<void> MachineOperand::setRegister(Register Reg) {
     return makeUnexpected(ErrorCode::InvalidArgument, "setRegister requires a register operand");
   }
 
+  if (std::get<Register>(Storage) == Reg)
+    return {};
+
+  RegFlags.clear(RegisterOperandFlag::Renamable);
+
   MachineRegisterInfo *RegInfo = LinkedRegInfo;
   if (RegInfo == nullptr && Parent != nullptr)
     RegInfo = &Parent->function().registerInfo();
-- 
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