From e16de95dce32f077361577377d5c52fc4ad78339 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Fri, 7 Aug 2026 02:15:09 +0800 Subject: [RISCV] Add generated RV64GC register description Add an RCC-owned build-time target description generator and the initial RV64GC register model. Keep ABI aliases separate from canonical MIR register spelling. --- backend/lib/CodeGen/TargetDescription.cpp | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) (limited to 'backend/lib/CodeGen/TargetDescription.cpp') diff --git a/backend/lib/CodeGen/TargetDescription.cpp b/backend/lib/CodeGen/TargetDescription.cpp index b9f7606..e2bbe8a 100644 --- a/backend/lib/CodeGen/TargetDescription.cpp +++ b/backend/lib/CodeGen/TargetDescription.cpp @@ -175,10 +175,10 @@ Expected TargetDescription::validateVirtualRegister(Register Reg, return makeUnexpected(ErrorCode::VerificationError, "virtual register allocation hint names an unknown physical register"); } - if (HintDesc->IsConstant || HintDesc->IsArtificial) { + if (HintDesc->IsConstant || HintDesc->IsArtificial || HintDesc->IsReserved) { return makeUnexpected( ErrorCode::VerificationError, - "virtual register allocation hint names a constant or artificial register"); + "virtual register allocation hint names a constant, artificial, or reserved register"); } if (Info.RegClass && !Registers.registerClassContains(*Info.RegClass, Hint)) { return makeUnexpected(ErrorCode::VerificationError, @@ -283,7 +283,8 @@ Expected TargetDescription::validateTargetOperand(const OperandDescriptor return Registers.regsOverlap(Reserved, PhysRegValue); }); if (Operand.registerFlags().has(RegisterOperandFlag::Renamable) && - (IsReservedOrAlias || PhysRegDesc->IsConstant || PhysRegDesc->IsArtificial)) { + (IsReservedOrAlias || PhysRegDesc->IsConstant || PhysRegDesc->IsArtificial || + PhysRegDesc->IsReserved)) { return makeUnexpected(ErrorCode::VerificationError, "fixed physical register operand cannot be renamable"); } @@ -718,9 +719,15 @@ Expected TargetDescription::validateRegisterInfo(const MachineRegisterInfo if (!Validation) return std::unexpected(Validation.error()); for (const PhysicalRegister Hint : Info.AllocationHints) { - if (std::ranges::any_of(RegInfo.reservedRegisters(), [this, Hint](PhysicalRegister Reserved) { + const bool IsStaticReservedOrAlias = std::ranges::any_of( + Registers.physicalRegisters(), [this, Hint](const PhysicalRegisterDesc &Register) { + return Register.IsReserved && Registers.regsOverlap(Register.Reg, Hint); + }); + const bool IsFunctionReservedOrAlias = + std::ranges::any_of(RegInfo.reservedRegisters(), [this, Hint](PhysicalRegister Reserved) { return Registers.regsOverlap(Reserved, Hint); - })) { + }); + if (IsStaticReservedOrAlias || IsFunctionReservedOrAlias) { return makeUnexpected( ErrorCode::VerificationError, "virtual register allocation hint overlaps a reserved physical register"); -- cgit v1.2.3