From 3341938bb644e6fc39afa6a8fcb1306604999e42 Mon Sep 17 00:00:00 2001
From: Richard-Qin-X <richard.qin.001@gmail.com>
Date: Wed, 12 Aug 2026 22:37:49 +0800
Subject: [RISCV] Split the GlobalISel target components

---
 backend/lib/Target/RISCV/GISel/RISCVCallLowering.h | 53 ++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 backend/lib/Target/RISCV/GISel/RISCVCallLowering.h

(limited to 'backend/lib/Target/RISCV/GISel/RISCVCallLowering.h')

diff --git a/backend/lib/Target/RISCV/GISel/RISCVCallLowering.h b/backend/lib/Target/RISCV/GISel/RISCVCallLowering.h
new file mode 100644
index 0000000..dad0875
--- /dev/null
+++ b/backend/lib/Target/RISCV/GISel/RISCVCallLowering.h
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#ifndef RCC_LIB_TARGET_RISCV_GISEL_RISCVCALLLOWERING_H
+#define RCC_LIB_TARGET_RISCV_GISEL_RISCVCALLLOWERING_H
+
+#include "rcc/CodeGen/TargetCallLowering.h"
+#include "rcc/Target/RISCV/RISCVInstructions.h"
+
+#include <cstdint>
+
+namespace rcc::riscv {
+
+enum class CallTargetFlag : std::uint32_t {
+  DirectCall = 1U << 0U,
+};
+
+enum class CallStackObjectFlag : std::uint64_t {
+  IncomingArgument = 1ULL << 0U,
+  OutgoingArgument = 1ULL << 1U,
+  ByValCopy = 1ULL << 2U,
+  VarArgSaveArea = 1ULL << 3U,
+  VarArgAlignmentPadding = 1ULL << 4U,
+};
+
+enum class CallValueTransform : std::uint8_t {
+  Full,
+  AnyExtend,
+  SignExtend,
+  ZeroExtend,
+  Truncate,
+  Bitcast,
+};
+
+[[nodiscard]] constexpr CallingConventionID
+callingConventionID(CallingConvention Convention) noexcept {
+  return CallingConventionID::fromValue(static_cast<std::uint32_t>(Convention));
+}
+
+class RISCVCallLowering final : public TargetCallLowering {
+public:
+  [[nodiscard]] Expected<CallLoweringPlan>
+  planFormalArguments(const FormalArgumentRequest &Request) const override;
+  [[nodiscard]] Expected<CallLoweringPlan>
+  planCall(const CallLoweringRequest &Request) const override;
+  [[nodiscard]] Expected<CallLoweringPlan>
+  planReturn(const ReturnLoweringRequest &Request) const override;
+  [[nodiscard]] Expected<void> emitPlan(MachineIRBuilder &Builder,
+                                        const CallLoweringPlan &Plan) const override;
+};
+
+} // namespace rcc::riscv
+
+#endif // RCC_LIB_TARGET_RISCV_GISEL_RISCVCALLLOWERING_H
-- 
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