From 81afb6570000472c182e5b1f540f69382602aaad Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Mon, 24 Aug 2026 17:30:29 +0800 Subject: [RISCV] Match LLVM emergency spill layout --- backend/lib/Target/RISCV/RISCV.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'backend/lib/Target/RISCV/RISCV.h') diff --git a/backend/lib/Target/RISCV/RISCV.h b/backend/lib/Target/RISCV/RISCV.h index a2212d4..0a4038b 100644 --- a/backend/lib/Target/RISCV/RISCV.h +++ b/backend/lib/Target/RISCV/RISCV.h @@ -37,8 +37,8 @@ createSchedulingModel(const TargetSchedulingHooks &Hooks); [[nodiscard]] const TargetMemoryFoldingInfo &memoryFoldingInfo() noexcept; [[nodiscard]] const TargetPseudoExpansionInfo &pseudoExpansionInfo() noexcept; [[nodiscard]] MachineOptimizationPipelineTargetInfo -optimizationPipelineInfo(const RISCVSubtarget &Subtarget, - bool EmitSchedulerDebugOutput = false) noexcept; +optimizationPipelineInfo(const RISCVSubtarget &Subtarget, bool EmitSchedulerDebugOutput = false, + bool EmitFrameDebugOutput = false) noexcept; } // namespace riscv } // namespace rcc -- cgit v1.2.3