From 98cae0e8835a1eb8fcb0e43870c04ed934cc51ac Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Thu, 13 Aug 2026 19:38:37 +0800 Subject: [CodeGen] Match LLVM branch relaxation semantics --- backend/lib/Target/RISCV/RISCV.rccdesc | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'backend/lib/Target/RISCV/RISCV.rccdesc') diff --git a/backend/lib/Target/RISCV/RISCV.rccdesc b/backend/lib/Target/RISCV/RISCV.rccdesc index c4a87e9..910ea3f 100644 --- a/backend/lib/Target/RISCV/RISCV.rccdesc +++ b/backend/lib/Target/RISCV/RISCV.rccdesc @@ -3962,6 +3962,7 @@ instructions: implicit_defs: [{ register: X1 }] allow_extra_implicit_operands: true flags: [pseudo, produces_code, allowed_pre_legalizer, call, may_load, may_store, has_side_effects, not_duplicable, unmodeled_side_effects] + size: 8 owner: post_ra_expansion deadline: post_ra_finalized - @@ -3974,6 +3975,7 @@ instructions: num_explicit_defs: 0 allow_extra_implicit_operands: true flags: [pseudo, produces_code, allowed_pre_legalizer, terminator, branch, call, barrier, may_load, may_store, has_side_effects, not_duplicable, unmodeled_side_effects] + size: 8 owner: post_ra_expansion deadline: post_ra_finalized - @@ -3984,6 +3986,7 @@ instructions: num_explicit_defs: 0 allow_extra_implicit_operands: true flags: [pseudo, produces_code, allowed_pre_legalizer, terminator, return, barrier] + size: 4 owner: post_ra_expansion deadline: post_ra_finalized - @@ -4044,5 +4047,6 @@ instructions: - { kinds: [basic_block], name: TARGET } num_explicit_defs: 0 flags: [pseudo, produces_code, allowed_pre_legalizer, terminator, branch, barrier] + size: 4 owner: post_ra_expansion deadline: post_ra_finalized -- cgit v1.2.3