From 0461d2ba6bf1aedbd0d39e5da4daf90137bf61a7 Mon Sep 17 00:00:00 2001
From: Richard-Qin-X <richard.qin.001@gmail.com>
Date: Wed, 19 Aug 2026 02:59:49 +0800
Subject: [RISCV][GlobalISel] Generate select instruction matching

---
 backend/lib/Target/RISCV/RISCVInstrInfo.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

(limited to 'backend/lib/Target/RISCV/RISCVInstrInfo.h')

diff --git a/backend/lib/Target/RISCV/RISCVInstrInfo.h b/backend/lib/Target/RISCV/RISCVInstrInfo.h
index 62c7723..171a9f3 100644
--- a/backend/lib/Target/RISCV/RISCVInstrInfo.h
+++ b/backend/lib/Target/RISCV/RISCVInstrInfo.h
@@ -5,8 +5,19 @@
 
 #include "rcc/CodeGen/TargetInstrInfo.h"
 
+#include <cstdint>
+
 namespace rcc::riscv {
 
+enum class BranchConditionCode : std::uint32_t {
+  Equal = 0,
+  NotEqual = 1,
+  SignedLessThan = 2,
+  SignedGreaterEqual = 3,
+  UnsignedLessThan = 4,
+  UnsignedGreaterEqual = 5,
+};
+
 [[nodiscard]] const TargetInstrInfo &instrInfo() noexcept;
 
 } // namespace rcc::riscv
-- 
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