From c0f2700e0c7effc5da267bf501232ff4bfea63bc Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Wed, 19 Aug 2026 03:08:38 +0800 Subject: [RISCV][GlobalISel] Generate trap selection --- backend/lib/Target/RISCV/RISCVInstrInfoI.rccdesc | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'backend/lib/Target/RISCV/RISCVInstrInfoI.rccdesc') diff --git a/backend/lib/Target/RISCV/RISCVInstrInfoI.rccdesc b/backend/lib/Target/RISCV/RISCVInstrInfoI.rccdesc index 3c5711c..33f13a9 100644 --- a/backend/lib/Target/RISCV/RISCVInstrInfoI.rccdesc +++ b/backend/lib/Target/RISCV/RISCVInstrInfoI.rccdesc @@ -783,6 +783,18 @@ instructions: scheduling_class: SYSTEM encoding_category: SYSTEM assembly_format: NONE + - + id: 1266 + symbol: UNIMP + name: UNIMP + assembly_mnemonic: unimp + encoding: 3221229683 + operands: [] + num_explicit_defs: 0 + flags: [has_side_effects, produces_code] + scheduling_class: SYSTEM + encoding_category: SYSTEM + assembly_format: NONE - id: 1036 symbol: SLTI -- cgit v1.2.3