From 8a4bb6e3b0bffa0ed79b51347b12ee4293b622a7 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Sat, 22 Aug 2026 18:49:08 +0800 Subject: [CodeGen] Generate RISC-V macro fusion rules --- backend/lib/Target/RISCV/RISCVOptimizationPipeline.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'backend/lib/Target/RISCV/RISCVOptimizationPipeline.cpp') diff --git a/backend/lib/Target/RISCV/RISCVOptimizationPipeline.cpp b/backend/lib/Target/RISCV/RISCVOptimizationPipeline.cpp index 5bacc9c..7571832 100644 --- a/backend/lib/Target/RISCV/RISCVOptimizationPipeline.cpp +++ b/backend/lib/Target/RISCV/RISCVOptimizationPipeline.cpp @@ -5,14 +5,16 @@ namespace rcc::riscv { -MachineOptimizationPipelineTargetInfo optimizationPipelineInfo() noexcept { +MachineOptimizationPipelineTargetInfo +optimizationPipelineInfo(const RISCVSubtarget &Subtarget, bool EmitSchedulerDebugOutput) noexcept { return { .InstrInfo = instrInfo(), .Combiner = machineCombinerInfo(), .MemoryFolding = memoryFoldingInfo(), .FrameLowering = frameLowering(), .PseudoExpansion = pseudoExpansionInfo(), - .SchedulingModel = schedulingModel(), + .SchedulingModel = Subtarget.schedulingModel(), + .SchedulerOptions = {.EmitDebugOutput = EmitSchedulerDebugOutput}, }; } -- cgit v1.2.3