From aa69e15c6909c3b162b15f5326f0a72ba9bb7163 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Thu, 13 Aug 2026 23:55:38 +0800 Subject: [CodeGen] Unify scalar low-level types --- backend/lib/Target/RISCV/RISCVPseudoExpansion.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'backend/lib/Target/RISCV/RISCVPseudoExpansion.cpp') diff --git a/backend/lib/Target/RISCV/RISCVPseudoExpansion.cpp b/backend/lib/Target/RISCV/RISCVPseudoExpansion.cpp index d5d932c..b9cdb48 100644 --- a/backend/lib/Target/RISCV/RISCVPseudoExpansion.cpp +++ b/backend/lib/Target/RISCV/RISCVPseudoExpansion.cpp @@ -45,7 +45,8 @@ registerBank(Register Reg, const MachineFunction &Function, const TargetDescript return std::nullopt; } -[[nodiscard]] std::optional registerType(Register Reg, const MachineFunction &Function) { +[[nodiscard]] std::optional registerType(Register Reg, + const MachineFunction &Function) { if (!Reg.isVirtual()) return std::nullopt; auto Info = Function.registerInfo().virtualRegisterInfo(Reg); @@ -156,7 +157,7 @@ copyRegisters(const MachineInstr &Instruction) { const auto DestinationType = registerType(Registers->first, Function); const auto SourceType = registerType(Registers->second, Function); - const std::optional Type = DestinationType ? DestinationType : SourceType; + const std::optional Type = DestinationType ? DestinationType : SourceType; if (!Type || Type->isVector() || (Type->scalarBitWidth() != 32 && Type->scalarBitWidth() != 64)) { return makeUnexpected(ErrorCode::Unsupported, "RISC-V cross-bank COPY requires a scalar 32-bit or 64-bit type"); -- cgit v1.2.3