From 6c97d54954112be9a5badacaec8efa1d05bd7d15 Mon Sep 17 00:00:00 2001
From: Richard-Qin-X <richard.qin.001@gmail.com>
Date: Wed, 19 Aug 2026 02:50:30 +0800
Subject: [RISCV][GlobalISel] Generate indirect branch selection

---
 backend/lib/Target/RISCV/RISCVScheduling.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'backend/lib/Target/RISCV/RISCVScheduling.cpp')

diff --git a/backend/lib/Target/RISCV/RISCVScheduling.cpp b/backend/lib/Target/RISCV/RISCVScheduling.cpp
index 90b6620..a58b913 100644
--- a/backend/lib/Target/RISCV/RISCVScheduling.cpp
+++ b/backend/lib/Target/RISCV/RISCVScheduling.cpp
@@ -112,7 +112,8 @@ enum class PressureSet : std::uint32_t {
       {pressureSet(PressureSet::GPR),
        "gpr",
        {registerClass(RegisterClass::GPR), registerClass(RegisterClass::GPRC),
-        registerClass(RegisterClass::GPR_NX0), registerClass(RegisterClass::GPR_NX0_NX2)},
+        registerClass(RegisterClass::GPR_NX0), registerClass(RegisterClass::GPR_NX0_NX2),
+        registerClass(RegisterClass::GPRJALRNonX7)},
        27},
       {pressureSet(PressureSet::FPR),
        "fpr",
-- 
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