From b8fb9248e77e492c630ca135d1bfd58b74f9752a Mon Sep 17 00:00:00 2001
From: Richard-Qin-X <richard.qin.001@gmail.com>
Date: Mon, 24 Aug 2026 19:01:47 +0800
Subject: [CodeGen] Implement CFI instruction insertion

---
 backend/lib/Target/RISCV/RISCVFrameLowering.cpp | 6 ++++++
 backend/lib/Target/RISCV/RISCVPipeline.cpp      | 6 +++++-
 2 files changed, 11 insertions(+), 1 deletion(-)

(limited to 'backend/lib/Target/RISCV')

diff --git a/backend/lib/Target/RISCV/RISCVFrameLowering.cpp b/backend/lib/Target/RISCV/RISCVFrameLowering.cpp
index eefab63..7ffaccb 100644
--- a/backend/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/backend/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -1276,6 +1276,12 @@ class RISCVFrameLowering final : public TargetFrameLowering {
 public:
   explicit RISCVFrameLowering(const RISCVSubtarget &Subtarget) noexcept : Subtarget(Subtarget) {}
 
+  [[nodiscard]] PhysicalRegister
+  initialCFARegister(const MachineFunction &,
+                     const TargetDescription &Target) const noexcept override {
+    return Target.stackPointerRegisterToSaveRestore();
+  }
+
   [[nodiscard]] bool
   isCalleeSavedRegister(PhysicalRegister Reg, const MachineFunction &,
                         const TargetDescription &Target) const noexcept override {
diff --git a/backend/lib/Target/RISCV/RISCVPipeline.cpp b/backend/lib/Target/RISCV/RISCVPipeline.cpp
index 8ba86ce..e094591 100644
--- a/backend/lib/Target/RISCV/RISCVPipeline.cpp
+++ b/backend/lib/Target/RISCV/RISCVPipeline.cpp
@@ -6,6 +6,7 @@
 #include "GISel/RISCVRegisterBankInfo.h"
 #include "RISCV.h"
 #include "RISCVInstrInfo.h"
+#include "rcc/CodeGen/CFIInstrInserter.h"
 #include "rcc/CodeGen/GlobalISel/Combiner.h"
 #include "rcc/CodeGen/GlobalISel/InstructionSelect.h"
 #include "rcc/CodeGen/GlobalISel/Legalizer.h"
@@ -97,12 +98,15 @@ template <typename PassT, typename... ArgumentT>
   Added = addRegisterAllocationPipeline(Pipeline, Subtarget, Options);
   if (!Added)
     return std::unexpected(Added.error());
-  return addPostRegisterAllocationPipeline(
+  Added = addPostRegisterAllocationPipeline(
       Pipeline,
       optimizationPipelineInfo(Subtarget, Options.DebugMachineScheduler,
                                Options.DebugPrologueEpilogue),
       MachineOptimizationPipelineOptions{.UseTargetCopyInstructions =
                                              Options.UseTargetCopyInstructions});
+  if (!Added)
+    return std::unexpected(Added.error());
+  return addPass<CFIInstrInserterPass>(Pipeline, Subtarget.frameLowering());
 }
 
 } // namespace
-- 
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