From c0f2700e0c7effc5da267bf501232ff4bfea63bc Mon Sep 17 00:00:00 2001
From: Richard-Qin-X <richard.qin.001@gmail.com>
Date: Wed, 19 Aug 2026 03:08:38 +0800
Subject: [RISCV][GlobalISel] Generate trap selection

---
 .../lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp  | 16 ----------------
 backend/lib/Target/RISCV/RISCVGISelControlFlow.rccdesc   | 16 ++++++++++++++++
 backend/lib/Target/RISCV/RISCVInstrInfoI.rccdesc         | 12 ++++++++++++
 3 files changed, 28 insertions(+), 16 deletions(-)

(limited to 'backend/lib/Target/RISCV')

diff --git a/backend/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp b/backend/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
index 379360b..dd63743 100644
--- a/backend/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
+++ b/backend/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
@@ -522,9 +522,6 @@ public:
     case GenericOpcode::G_ATOMICRMW_UMIN:
     case GenericOpcode::G_FENCE:
     case GenericOpcode::G_BRINDIRECT:
-    case GenericOpcode::G_TRAP:
-    case GenericOpcode::G_DEBUGTRAP:
-    case GenericOpcode::G_UBSANTRAP:
     case GenericOpcode::G_PHI:
       return {};
     default:
@@ -599,10 +596,6 @@ public:
       return selectAtomicRMW(Instruction, Function, Target, Type, Generic);
     case GenericOpcode::G_FENCE:
       return selectFence(Instruction);
-    case GenericOpcode::G_TRAP:
-    case GenericOpcode::G_DEBUGTRAP:
-    case GenericOpcode::G_UBSANTRAP:
-      return selectTrap(Instruction);
     case GenericOpcode::G_PHI:
       return Instruction.setOpcode(opcode(GenericOpcode::PHI));
     case GenericOpcode::COPY:
@@ -1158,15 +1151,6 @@ private:
     return Instruction.setOpcode(instructionOpcode(InstructionOpcode::FENCE));
   }
 
-  [[nodiscard]] Expected<void> selectTrap(MachineInstr &Instruction) const {
-    while (Instruction.operandCount() != 0) {
-      auto Erased = Instruction.eraseOperand(Instruction.operandCount() - 1U);
-      if (!Erased)
-        return std::unexpected(Erased.error());
-    }
-    return Instruction.setOpcode(instructionOpcode(InstructionOpcode::EBREAK));
-  }
-
   [[nodiscard]] Expected<void> selectLoad(MachineInstr &Instruction, MachineFunction &Function,
                                           std::optional<LowLevelType> Type) const {
     if (!Type)
diff --git a/backend/lib/Target/RISCV/RISCVGISelControlFlow.rccdesc b/backend/lib/Target/RISCV/RISCVGISelControlFlow.rccdesc
index 21fd338..7f8b67c 100644
--- a/backend/lib/Target/RISCV/RISCVGISelControlFlow.rccdesc
+++ b/backend/lib/Target/RISCV/RISCVGISelControlFlow.rccdesc
@@ -1,6 +1,22 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 selection_rules:
+  -
+    id: select_g_trap
+    priority: 100
+    match:
+      opcode: G_TRAP
+    apply:
+      instructions:
+        - { opcode: UNIMP, root: true, operands: [] }
+  -
+    id: select_g_debugtrap
+    priority: 100
+    match:
+      opcode: G_DEBUGTRAP
+    apply:
+      instructions:
+        - { opcode: EBREAK, root: true, operands: [] }
   -
     id: select_g_brindirect
     priority: 100
diff --git a/backend/lib/Target/RISCV/RISCVInstrInfoI.rccdesc b/backend/lib/Target/RISCV/RISCVInstrInfoI.rccdesc
index 3c5711c..33f13a9 100644
--- a/backend/lib/Target/RISCV/RISCVInstrInfoI.rccdesc
+++ b/backend/lib/Target/RISCV/RISCVInstrInfoI.rccdesc
@@ -783,6 +783,18 @@ instructions:
     scheduling_class: SYSTEM
     encoding_category: SYSTEM
     assembly_format: NONE
+  -
+    id: 1266
+    symbol: UNIMP
+    name: UNIMP
+    assembly_mnemonic: unimp
+    encoding: 3221229683
+    operands: []
+    num_explicit_defs: 0
+    flags: [has_side_effects, produces_code]
+    scheduling_class: SYSTEM
+    encoding_category: SYSTEM
+    assembly_format: NONE
   -
     id: 1036
     symbol: SLTI
-- 
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