From 6437353113cc011fe316c61da404fe86c472f776 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Wed, 12 Aug 2026 03:23:48 +0800 Subject: [clang-format] Format MIR sources --- backend/lib/MIR/MIPrinter.cpp | 13 +++++-------- backend/lib/MIR/MIRFunctionParser.cpp | 11 ++++++----- 2 files changed, 11 insertions(+), 13 deletions(-) (limited to 'backend/lib') diff --git a/backend/lib/MIR/MIPrinter.cpp b/backend/lib/MIR/MIPrinter.cpp index 6f88414..0265564 100644 --- a/backend/lib/MIR/MIPrinter.cpp +++ b/backend/lib/MIR/MIPrinter.cpp @@ -273,8 +273,7 @@ private: [[nodiscard]] Expected printOperand(const MachineOperand &Operand, bool IsExplicitDef, bool PrintVirtualType = true); [[nodiscard]] Expected printInlineAsmExtraInfo(const MachineOperand &Operand); - [[nodiscard]] Expected - printInlineAsmOperandFlag(const MachineOperand &Operand); + [[nodiscard]] Expected printInlineAsmOperandFlag(const MachineOperand &Operand); [[nodiscard]] Expected printRegisterOperand(const MachineOperand &Operand, bool IsExplicitDef, bool PrintVirtualType); [[nodiscard]] Expected printTargetFlags(std::uint32_t Flags); @@ -482,8 +481,8 @@ Expected BodyPrinter::printDILocation(const MachineDILocation &Location, return {}; } -Expected BodyPrinter::printRegisterOperand(const MachineOperand &Operand, - bool IsExplicitDef, bool PrintVirtualType) { +Expected BodyPrinter::printRegisterOperand(const MachineOperand &Operand, bool IsExplicitDef, + bool PrintVirtualType) { const RegisterOperandFlags Flags = Operand.registerFlags(); if (Flags.has(RegisterOperandFlag::Implicit) && Flags.has(RegisterOperandFlag::Define)) { Output.append("implicit-def "); @@ -1407,8 +1406,7 @@ Expected BodyPrinter::printInstruction(const MachineInstr &Instruction) { } bool PrintVirtualType = true; if (Descriptor->Flags.has(InstructionFlag::Generic) && - !Descriptor->Flags.has(InstructionFlag::Phi) && - Index < Descriptor->Operands.size()) { + !Descriptor->Flags.has(InstructionFlag::Phi) && Index < Descriptor->Operands.size()) { const std::optional &UseConstraint = Descriptor->Operands[Index].TypeConstraint; if (UseConstraint) { @@ -1425,8 +1423,7 @@ Expected BodyPrinter::printInstruction(const MachineInstr &Instruction) { } else if (const Register *UseRegister = Operand.getIf(); UseRegister != nullptr && UseRegister->isVirtual()) { const auto UseInfo = Function.registerInfo().virtualRegisterInfo(*UseRegister); - for (std::size_t DefIndex = 0; DefIndex < ExplicitDefs && UseInfo && - UseInfo->get().Type; + for (std::size_t DefIndex = 0; DefIndex < ExplicitDefs && UseInfo && UseInfo->get().Type; ++DefIndex) { if (DefIndex >= Descriptor->Operands.size() || Descriptor->Operands[DefIndex].TypeConstraint) diff --git a/backend/lib/MIR/MIRFunctionParser.cpp b/backend/lib/MIR/MIRFunctionParser.cpp index 8cf3abb..6acf774 100644 --- a/backend/lib/MIR/MIRFunctionParser.cpp +++ b/backend/lib/MIR/MIRFunctionParser.cpp @@ -185,8 +185,9 @@ bool MIRDocumentParser::recomputeProperties(const yaml::Node &Root, MachineFunct } if (DocumentInfo.HasFakeUses && !*DocumentInfo.HasFakeUses && HasFakeUse) { - return fail(Root.range(), std::string(Function.name()) + - " has explicit property hasFakeUses=false, but contains fake uses"); + return fail(Root.range(), + std::string(Function.name()) + + " has explicit property hasFakeUses=false, but contains fake uses"); } if (DocumentInfo.HasFakeUses.value_or(HasFakeUse)) Function.attributes().set(MachineFunctionAttribute::HasFakeUses); @@ -473,9 +474,9 @@ bool MIRDocumentParser::parseBody(const yaml::Node &Root, MachineFunction &Funct auto Parsed = Parser.parse(); if (!Parsed) { if (!Parser.diagnostics().empty()) { - const TextRange Range = Body == nullptr - ? BodyRange - : scalarDiagnosticRange(*Body, Parser.diagnostics().front().Range); + const TextRange Range = + Body == nullptr ? BodyRange + : scalarDiagnosticRange(*Body, Parser.diagnostics().front().Range); return fail(Range, Parser.diagnostics().front().Message, "mir-body"); } return importError(BodyRange, Parsed.error(), "mir-body"); -- cgit v1.2.3