From 4fe5ee649927d54d6fb74904d7b97ad0f63fd587 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Tue, 11 Aug 2026 17:38:11 +0800 Subject: [RISCV] Legalize fixed-baseline RV64 MachineIR --- backend/unittests/Target/Inputs/RISCVDataPipeline.mir | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'backend/unittests/Target/Inputs/RISCVDataPipeline.mir') diff --git a/backend/unittests/Target/Inputs/RISCVDataPipeline.mir b/backend/unittests/Target/Inputs/RISCVDataPipeline.mir index f847640..0d0c35d 100644 --- a/backend/unittests/Target/Inputs/RISCVDataPipeline.mir +++ b/backend/unittests/Target/Inputs/RISCVDataPipeline.mir @@ -13,6 +13,6 @@ jumpTable: body: | bb.0: liveins: $x1 - %0:gpr(i64) = G_CONSTANT 7 + %0:gprb(i64) = G_CONSTANT 7 $x10 = COPY %0 PseudoRET implicit $x1, implicit $x10 -- cgit v1.2.3