From e6cd1347cc2c76babe56842e1b7bd05d68fe9584 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Tue, 11 Aug 2026 23:44:57 +0800 Subject: [RISCV] Model typed floating-point register views --- backend/unittests/Target/RISCVLateCodeGenTest.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'backend/unittests/Target/RISCVLateCodeGenTest.cpp') diff --git a/backend/unittests/Target/RISCVLateCodeGenTest.cpp b/backend/unittests/Target/RISCVLateCodeGenTest.cpp index 5069137..e8ac9de 100644 --- a/backend/unittests/Target/RISCVLateCodeGenTest.cpp +++ b/backend/unittests/Target/RISCVLateCodeGenTest.cpp @@ -1122,7 +1122,8 @@ void testPostRAPseudoExpansionAndFinalization(TestContext &Context, return; } auto CrossCopy = Builder.buildInstr(rcc::opcode(rcc::GenericOpcode::COPY)); - if (!CrossCopy || !CrossCopy->addDef(physical(rcc::riscv::PhysicalRegisterID::F10), {}, {}, 16) || + if (!CrossCopy || + !CrossCopy->addDef(physical(rcc::riscv::PhysicalRegisterID::F10_D), {}, {}, 16) || !CrossCopy->addUse(physical(rcc::riscv::PhysicalRegisterID::X10), {}, {}, 16) || !CrossCopy->build()) { Context.expect(false, "post-RA cross-bank copy construction must succeed"); -- cgit v1.2.3