From 220c9cd426ec0590f6a43550b28fb344d8dfd8fd Mon Sep 17 00:00:00 2001
From: Richard-Qin-X <richard.qin.001@gmail.com>
Date: Sat, 15 Aug 2026 19:04:08 +0800
Subject: [RISCV][GlobalISel] Legalize floating-point to integer conversions

---
 backend/utils/TableGen/Common/CodeGenInstruction.cpp | 13 +++++++++++++
 backend/utils/TableGen/Common/CodeGenTarget.h        |  1 +
 backend/utils/TableGen/InstrInfoEmitter.cpp          | 11 ++++++++++-
 3 files changed, 24 insertions(+), 1 deletion(-)

(limited to 'backend/utils')

diff --git a/backend/utils/TableGen/Common/CodeGenInstruction.cpp b/backend/utils/TableGen/Common/CodeGenInstruction.cpp
index cabe8d4..c314304 100644
--- a/backend/utils/TableGen/Common/CodeGenInstruction.cpp
+++ b/backend/utils/TableGen/Common/CodeGenInstruction.cpp
@@ -287,6 +287,10 @@ pipelineStageEnumerator(std::string_view Value) noexcept {
     fail(InputOperand.Range, "register definition operands must accept only registers");
     return false;
   }
+  if (InputOperand.TypeIndex && !IsRegisterOnly) {
+    fail(InputOperand.Range, "instruction operand type_index requires exactly one register kind");
+    return false;
+  }
   if (!HasRegisterKind && (InputOperand.RegisterClassSymbol || InputOperand.RegisterBankSymbol ||
                            InputOperand.EarlyClobber || InputOperand.AllowSubReg)) {
     fail(InputOperand.Range, "non-register operands cannot have register constraints");
@@ -337,6 +341,7 @@ pipelineStageEnumerator(std::string_view Value) noexcept {
   Result.Optional = InputOperand.Optional;
   Result.VariadicGroup = InputOperand.VariadicGroup;
   Result.AllowSubReg = InputOperand.AllowSubReg;
+  Result.TypeIndex = InputOperand.TypeIndex;
   Result.AllowedTargetFlags = InputOperand.AllowedTargetFlags;
   return true;
 }
@@ -529,6 +534,14 @@ CodeGenTarget::normalizeImplicitRegisters(const std::vector<SourceImplicitRegist
       return std::ranges::find(Normalized.Flags, Flag) != Normalized.Flags.end();
     };
     const bool IsTerminator = HasFlag("Terminator");
+    if (!HasFlag("Generic") &&
+        std::ranges::any_of(Normalized.Operands, [](const NormalizedOperand &Operand) {
+          return Operand.TypeIndex.has_value();
+        })) {
+      fail(Instruction.Range,
+           "instruction type_index operands require the generic instruction flag");
+      return false;
+    }
     if ((HasFlag("Branch") || HasFlag("Return") || HasFlag("Barrier") ||
          HasFlag("IndirectBranch")) &&
         !IsTerminator) {
diff --git a/backend/utils/TableGen/Common/CodeGenTarget.h b/backend/utils/TableGen/Common/CodeGenTarget.h
index 139cfc8..cbddd4a 100644
--- a/backend/utils/TableGen/Common/CodeGenTarget.h
+++ b/backend/utils/TableGen/Common/CodeGenTarget.h
@@ -131,6 +131,7 @@ struct NormalizedOperand final {
   bool VariadicGroup = false;
   bool AllowSubReg = false;
   std::optional<std::uint32_t> Name;
+  std::optional<std::uint16_t> TypeIndex;
   std::uint32_t AllowedTargetFlags = 0;
 };
 
diff --git a/backend/utils/TableGen/InstrInfoEmitter.cpp b/backend/utils/TableGen/InstrInfoEmitter.cpp
index b06134f..1f42d4a 100644
--- a/backend/utils/TableGen/InstrInfoEmitter.cpp
+++ b/backend/utils/TableGen/InstrInfoEmitter.cpp
@@ -49,7 +49,16 @@ void emitOperandDescriptor(std::ostream &Output, const NormalizedOperand &Operan
   else
     Output << "std::nullopt";
   Output << ", .TargetOperandType = std::nullopt, .AllowedTargetFlags = "
-         << Operand.AllowedTargetFlags << ", .TypeConstraint = std::nullopt},\n";
+         << Operand.AllowedTargetFlags << ", .TypeConstraint = ";
+  if (Operand.TypeIndex) {
+    Output << "OperandTypeConstraint{LowLevelTypeKindSet{"
+           << "LowLevelType::Kind::CategoryNeutralScalar, LowLevelType::Kind::Pointer, "
+           << "LowLevelType::Kind::Vector, LowLevelType::Kind::VectorPointer}, std::uint16_t{"
+           << *Operand.TypeIndex << "}}";
+  } else {
+    Output << "std::nullopt";
+  }
+  Output << "},\n";
 }
 
 void emitImplicitRegisterList(std::ostream &Output, const NormalizedTargetModel &Model,
-- 
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