From 3cc064e41f6913b176fbfb2d6e65d049f611b1d4 Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Wed, 19 Aug 2026 03:23:40 +0800 Subject: [RISCV][GlobalISel] Generate frame index selection --- backend/lib/Target/RISCV/CMakeLists.txt | 1 + backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) create mode 100644 backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc (limited to 'backend') diff --git a/backend/lib/Target/RISCV/CMakeLists.txt b/backend/lib/Target/RISCV/CMakeLists.txt index 48f3263..3972a92 100644 --- a/backend/lib/Target/RISCV/CMakeLists.txt +++ b/backend/lib/Target/RISCV/CMakeLists.txt @@ -15,6 +15,7 @@ set( "${CMAKE_CURRENT_SOURCE_DIR}/RISCVInstrInfoZb.rccdesc" "${CMAKE_CURRENT_SOURCE_DIR}/RISCVInstrInfoPseudo.rccdesc" "${CMAKE_CURRENT_SOURCE_DIR}/RISCVGISelInteger.rccdesc" + "${CMAKE_CURRENT_SOURCE_DIR}/RISCVGISelAddressing.rccdesc" "${CMAKE_CURRENT_SOURCE_DIR}/RISCVGISelControlFlow.rccdesc" "${CMAKE_CURRENT_SOURCE_DIR}/RISCVGISelShift.rccdesc" "${CMAKE_CURRENT_SOURCE_DIR}/RISCVGISelFloating.rccdesc" diff --git a/backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc b/backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc new file mode 100644 index 0000000..f69ab81 --- /dev/null +++ b/backend/lib/Target/RISCV/RISCVGISelAddressing.rccdesc @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +selection_rules: + - + id: select_g_frame_index + priority: 100 + match: + opcode: G_FRAME_INDEX + result_type: { kind: pointer, bits: 64 } + operand_banks: + - { index: 0, bank: GPR } + apply: + instructions: + - opcode: ADDI + root: true + operands: [{ operand: 0 }, { operand: 1 }, { immediate: 0 }] -- cgit v1.2.3