From 46db486c089e9c2d6b05287476d7975723929acf Mon Sep 17 00:00:00 2001 From: Richard-Qin-X Date: Wed, 12 Aug 2026 02:39:11 +0800 Subject: [RISCV] Make call-preserved masks optional --- backend/lib/Target/RISCV/RISCV.rccdesc | 4 ++-- backend/unittests/Target/RISCVTargetTest.cpp | 6 +++++- 2 files changed, 7 insertions(+), 3 deletions(-) (limited to 'backend') diff --git a/backend/lib/Target/RISCV/RISCV.rccdesc b/backend/lib/Target/RISCV/RISCV.rccdesc index 54372ea..bbf70b7 100644 --- a/backend/lib/Target/RISCV/RISCV.rccdesc +++ b/backend/lib/Target/RISCV/RISCV.rccdesc @@ -3643,7 +3643,7 @@ instructions: name: PseudoCALL operands: - { kinds: [global_symbol, external_symbol, register], role: use, allowed_target_flags: 1 } - - { kinds: [register_mask] } + - { kinds: [register_mask], optional: true } num_explicit_defs: 0 implicit_defs: [{ register: X1 }] allow_extra_implicit_operands: true @@ -3656,7 +3656,7 @@ instructions: name: PseudoTAIL operands: - { kinds: [global_symbol, external_symbol, register], role: use, allowed_target_flags: 1 } - - { kinds: [register_mask] } + - { kinds: [register_mask], optional: true } num_explicit_defs: 0 allow_extra_implicit_operands: true flags: [pseudo, produces_code, allowed_pre_legalizer, terminator, branch, call, barrier, may_load, may_store, has_side_effects, not_duplicable, unmodeled_side_effects] diff --git a/backend/unittests/Target/RISCVTargetTest.cpp b/backend/unittests/Target/RISCVTargetTest.cpp index 2515201..555db4c 100644 --- a/backend/unittests/Target/RISCVTargetTest.cpp +++ b/backend/unittests/Target/RISCVTargetTest.cpp @@ -188,6 +188,8 @@ void testInstructionFacts(TestContext &Context) { const auto *GenericAdd = Target->instructionDescriptor(rcc::opcode(rcc::GenericOpcode::G_ADD)); const auto *PseudoCall = Target->instructionDescriptor(rcc::Opcode::fromValue( static_cast(rcc::riscv::InstructionOpcode::PseudoCALL))); + const auto *PseudoTail = Target->instructionDescriptor(rcc::Opcode::fromValue( + static_cast(rcc::riscv::InstructionOpcode::PseudoTAIL))); const auto *Assembly = rcc::riscv::assemblyInstruction( rcc::Opcode::fromValue(static_cast(rcc::riscv::InstructionOpcode::ADDI))); const auto *FenceAssembly = rcc::riscv::assemblyInstruction( @@ -239,7 +241,9 @@ void testInstructionFacts(TestContext &Context) { Compressed != nullptr && Compressed->ImplicitDefs.size() == 1 && Compressed->ImplicitUses.size() == 1 && GenericAdd != nullptr && GenericAdd->Flags.has(rcc::InstructionFlag::Generic) && PseudoCall != nullptr && - PseudoCall->Flags.has(rcc::InstructionFlag::Pseudo) && + PseudoCall->Operands.size() == 2 && PseudoCall->Operands[1].Optional && + PseudoTail != nullptr && PseudoTail->Operands.size() == 2 && + PseudoTail->Operands[1].Optional && PseudoCall->Flags.has(rcc::InstructionFlag::Pseudo) && PseudoCall->Flags.has(rcc::InstructionFlag::Call) && rcc::riscv::assemblyInstruction(PseudoCall->InstructionOpcode) == nullptr && Assembly != nullptr && Assembly->Mnemonic == "addi" && -- cgit v1.2.3