From 328d4ef7537a98bab8f6891a0280cda9e03b0cee Mon Sep 17 00:00:00 2001
From: Richard Qin <richard.qin.x@gmail.com>
Date: Tue, 7 Apr 2026 21:21:03 +0800
Subject: feat(tlb): enhance TLB functionality with ASID-targeted flush and
 additional test cases

---
 rv64cpu/CMakeLists.txt | 6 ++++++
 1 file changed, 6 insertions(+)

(limited to 'rv64cpu/CMakeLists.txt')

diff --git a/rv64cpu/CMakeLists.txt b/rv64cpu/CMakeLists.txt
index 4649abb..da146d5 100644
--- a/rv64cpu/CMakeLists.txt
+++ b/rv64cpu/CMakeLists.txt
@@ -1,4 +1,9 @@
 cmake_minimum_required(VERSION 3.20)
+
+if(POLICY CMP0144)
+    cmake_policy(SET CMP0144 NEW)
+endif()
+
 project(richard_cpu
     VERSION 0.1.0
     DESCRIPTION "RV64IMAZicsr_Zifencei Five-Stage Pipelined CPU SoC"
@@ -54,6 +59,7 @@ file(MAKE_DIRECTORY ${CMAKE_SOURCE_DIR}/waves)
 
 # ─── Testing ────────────────────────────────────────────────────────────────────
 enable_testing()
+include(CTest)
 
 # ─── Testbench Subdirectory ─────────────────────────────────────────────────────
 add_subdirectory(tb)
-- 
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