From 639212a826659c591db3202607c4a47e1049b92a Mon Sep 17 00:00:00 2001 From: Richard Qin Date: Tue, 7 Apr 2026 22:42:49 +0800 Subject: refactor: standardize interrupt signal naming across the codebase --- rv64cpu/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'rv64cpu/README.md') diff --git a/rv64cpu/README.md b/rv64cpu/README.md index 72b3546..a7e62a5 100644 --- a/rv64cpu/README.md +++ b/rv64cpu/README.md @@ -130,7 +130,7 @@ richard-cpu/ |---|---| | P1 | RV64I five-stage pipeline + hazard handling (Done) | | P2 | CSR + M/S/U privilege levels + Trap (Done) | -| P3 | MMU (Sv39 TLB + PTW) | +| P3 | MMU (TLB + PTW) | | P4 | Cache + AXI4-Full Burst | | P5 | Peripherals + AXI4-Lite bridge + SoC integration | | P6 | Pass riscv-arch-test (In Progress: strict suites above all pass) | -- cgit v1.2.3