From e0948e3fc10029ba4bb4d48d7b5daae94fe575b9 Mon Sep 17 00:00:00 2001
From: Richard Qin <richard.qin.x@gmail.com>
Date: Sat, 7 Nov 2026 03:16:17 +0800
Subject: refactor: align RTL module names with files

---
 rv64cpu/rtl/core/registers/fpr_file.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'rv64cpu/rtl/core/registers/fpr_file.sv')

diff --git a/rv64cpu/rtl/core/registers/fpr_file.sv b/rv64cpu/rtl/core/registers/fpr_file.sv
index 67e83f9..7522b5f 100644
--- a/rv64cpu/rtl/core/registers/fpr_file.sv
+++ b/rv64cpu/rtl/core/registers/fpr_file.sv
@@ -4,7 +4,7 @@
 // File path: rtl/core/fp_regfile.sv
 // Description: 32-entry 64-bit floating-point register file for RV64F/RV64D.
 
-module fp_regfile
+module fpr_file
     import rv64_pkg::*;
 (
     input  logic            clk,
-- 
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