From 595c88dddaf4ddd14d0f24b2016a573fe96a6a02 Mon Sep 17 00:00:00 2001 From: Richard Qin Date: Tue, 17 Mar 2026 03:50:04 +0800 Subject: EX/MEM Pipeline Register unit and tests --- rv64cpu/tb/CMakeLists.txt | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'rv64cpu/tb/CMakeLists.txt') diff --git a/rv64cpu/tb/CMakeLists.txt b/rv64cpu/tb/CMakeLists.txt index cd419f9..67d3c7a 100644 --- a/rv64cpu/tb/CMakeLists.txt +++ b/rv64cpu/tb/CMakeLists.txt @@ -114,6 +114,15 @@ add_verilator_target( INCLUDE_DIRS ${RTL_COMMON_INCLUDES} TB_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/unit/tb_ex_stage.cc ) + +add_verilator_target( + NAME tb_ex_mem_reg + TOP_MODULE ex_mem_reg + SOURCES ${RTL_CORE_DIR}/include/rv64_pkg.sv + ${RTL_CORE_DIR}/ex_mem_reg.sv + INCLUDE_DIRS ${RTL_COMMON_INCLUDES} + TB_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/unit/tb_ex_mem_reg.cc +) # # add_verilator_target( # NAME tb_csr -- cgit v1.2.3