From c7f2affd837eff161a475230d099bb88bb9f5bd7 Mon Sep 17 00:00:00 2001
From: Richard Qin <richard.qin.x@gmail.com>
Date: Thu, 19 Mar 2026 02:20:16 +0800
Subject: CSR unit and tests

---
 rv64cpu/tb/CMakeLists.txt | 20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

(limited to 'rv64cpu/tb/CMakeLists.txt')

diff --git a/rv64cpu/tb/CMakeLists.txt b/rv64cpu/tb/CMakeLists.txt
index 1b6173a..48a4185 100644
--- a/rv64cpu/tb/CMakeLists.txt
+++ b/rv64cpu/tb/CMakeLists.txt
@@ -160,15 +160,15 @@ add_verilator_target(
     TB_SOURCES  ${CMAKE_CURRENT_SOURCE_DIR}/unit/tb_hazard_unit.cc
 )
 #
-# add_verilator_target(
-#     NAME        tb_csr
-#     TOP_MODULE  csr_unit
-#     SOURCES     ${RTL_CORE_DIR}/include/rv64_pkg.sv
-#                 ${RTL_CORE_DIR}/include/csr_pkg.sv
-#                 ${RTL_CORE_DIR}/csr_unit.sv
-#     INCLUDE_DIRS ${RTL_COMMON_INCLUDES}
-#     TB_SOURCES  ${CMAKE_CURRENT_SOURCE_DIR}/unit/tb_csr.cc
-# )
+add_verilator_target(
+    NAME        tb_csr
+    TOP_MODULE  csr_unit
+    SOURCES     ${RTL_CORE_DIR}/include/rv64_pkg.sv
+                ${RTL_CORE_DIR}/include/csr_pkg.sv
+                ${RTL_CORE_DIR}/csr_unit.sv
+    INCLUDE_DIRS ${RTL_COMMON_INCLUDES}
+    TB_SOURCES  ${CMAKE_CURRENT_SOURCE_DIR}/unit/tb_csr.cc
+)
 
 # ═══════════════════════════════════════════════════════════════════════════════════
 # Core Integration Test
@@ -192,6 +192,8 @@ add_verilator_target(
                 ${RTL_CORE_DIR}/mem_wb_reg.sv
                 ${RTL_CORE_DIR}/wb_stage.sv
                 ${RTL_CORE_DIR}/hazard_unit.sv
+                ${RTL_CORE_DIR}/include/csr_pkg.sv
+                ${RTL_CORE_DIR}/csr_unit.sv
                 ${RTL_CORE_DIR}/richard_core.sv
     INCLUDE_DIRS ${RTL_COMMON_INCLUDES}
     TB_SOURCES  ${CMAKE_CURRENT_SOURCE_DIR}/core/tb_core.cc
-- 
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