From cd638dacbe7d0f890206209317cc119246cf700b Mon Sep 17 00:00:00 2001
From: Richard Qin <richard.qin.x@gmail.com>
Date: Tue, 17 Mar 2026 02:39:24 +0800
Subject: Execute Stage unit and tests

---
 rv64cpu/tb/CMakeLists.txt | 11 +++++++++++
 1 file changed, 11 insertions(+)

(limited to 'rv64cpu/tb/CMakeLists.txt')

diff --git a/rv64cpu/tb/CMakeLists.txt b/rv64cpu/tb/CMakeLists.txt
index e0a3238..cd419f9 100644
--- a/rv64cpu/tb/CMakeLists.txt
+++ b/rv64cpu/tb/CMakeLists.txt
@@ -103,6 +103,17 @@ add_verilator_target(
     INCLUDE_DIRS ${RTL_COMMON_INCLUDES}
     TB_SOURCES  ${CMAKE_CURRENT_SOURCE_DIR}/unit/tb_id_ex_reg.cc
 )
+
+add_verilator_target(
+    NAME        tb_ex_stage
+    TOP_MODULE  ex_stage
+    SOURCES     ${RTL_CORE_DIR}/include/rv64_pkg.sv
+                ${RTL_CORE_DIR}/alu.sv
+                ${RTL_CORE_DIR}/branch_unit.sv
+                ${RTL_CORE_DIR}/ex_stage.sv
+    INCLUDE_DIRS ${RTL_COMMON_INCLUDES}
+    TB_SOURCES  ${CMAKE_CURRENT_SOURCE_DIR}/unit/tb_ex_stage.cc
+)
 #
 # add_verilator_target(
 #     NAME        tb_csr
-- 
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