From bc3ec25107314be3cd816c0b669d82338e892806 Mon Sep 17 00:00:00 2001 From: Richard Qin Date: Sat, 7 Nov 2026 02:59:33 +0800 Subject: checkpoint: preserve current RV64 CPU development state --- rv64cpu/tb/unit/tb_hazard_unit.cc | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'rv64cpu/tb/unit/tb_hazard_unit.cc') diff --git a/rv64cpu/tb/unit/tb_hazard_unit.cc b/rv64cpu/tb/unit/tb_hazard_unit.cc index d43ccc5..6314ab8 100644 --- a/rv64cpu/tb/unit/tb_hazard_unit.cc +++ b/rv64cpu/tb/unit/tb_hazard_unit.cc @@ -45,6 +45,7 @@ void reset(Vhazard_unit* dut) { dut->ex_branch_target = 0; dut->mem_rd_addr = 0; dut->mem_reg_write_en = 0; + dut->mem_result_late = 0; dut->mem_stall_req = 0; dut->trap_flush_req = 0; dut->trap_pc_sel = 0; @@ -139,6 +140,26 @@ int main(int argc, char** argv) { dut->eval(); check(dut->forward_b_sel == 1, "FwdB_MEM_Priority_Over_WB"); + reset(dut); + dut->ex_rs1_addr = 3; + dut->mem_rd_addr = 3; + dut->mem_reg_write_en = 1; + dut->mem_result_late = 1; + dut->wb_rd_addr = 3; + dut->wb_reg_write_en = 1; + dut->eval(); + check(dut->forward_a_sel == 2, "LateResult_ForwardA_From_WB"); + + reset(dut); + dut->ex_rs2_addr = 3; + dut->mem_rd_addr = 3; + dut->mem_reg_write_en = 1; + dut->mem_result_late = 1; + dut->wb_rd_addr = 3; + dut->wb_reg_write_en = 1; + dut->eval(); + check(dut->forward_b_sel == 2, "LateResult_ForwardB_From_WB"); + // ----------------------- // 7. No forward to x0 (hardwired zero) // ----------------------- -- cgit v1.2.3