From 1554746fd79d51c6bd2281820520a4e2d2c16301 Mon Sep 17 00:00:00 2001
From: Richard Qin <richard.qin.x@gmail.com>
Date: Mon, 16 Mar 2026 14:40:52 +0800
Subject: fix naming problems

---
 rv64cpu/tb/unit/tb_regfile.cc | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

(limited to 'rv64cpu/tb/unit/tb_regfile.cc')

diff --git a/rv64cpu/tb/unit/tb_regfile.cc b/rv64cpu/tb/unit/tb_regfile.cc
index c96e395..eef92a2 100644
--- a/rv64cpu/tb/unit/tb_regfile.cc
+++ b/rv64cpu/tb/unit/tb_regfile.cc
@@ -36,9 +36,9 @@ int main(int argc, char** argv) {
 
     dut->clk = 0;
     dut->rst = 0;
-    dut->we = 0;
+    dut->reg_write_en = 0;
     dut->rd_addr = 0;
-    dut->rd_val = 0;
+    dut->rd_wdata = 0;
     dut->rs1_addr = 0;
     dut->rs2_addr = 0;
     
@@ -51,45 +51,45 @@ int main(int argc, char** argv) {
     std::cout << "[PASS] Reset complete" << std::endl;
 
     // Test 2: Write and read
-    dut->we = 1;
+    dut->reg_write_en = 1;
     dut->rd_addr = 5;
-    dut->rd_val = 0xDEADBEEF;
+    dut->rd_wdata = 0xDEADBEEF;
     tick(dut);
 
-    dut->we = 0;
+    dut->reg_write_en = 0;
     dut->rs1_addr = 5;
     dut->eval();
-    assert(dut->rs1_val == 0xDEADBEEF);
+    assert(dut->rs1_rdata == 0xDEADBEEF);
     std::cout << "[PASS] Write and read (x5) complete" << std::endl;
 
     // Test 3: x0
-    dut->we = 1;
+    dut->reg_write_en = 1;
     dut->rd_addr = 0;
-    dut->rd_val = 0x12345678;
+    dut->rd_wdata = 0x12345678;
     tick(dut);
     
-    dut->we = 0;
+    dut->reg_write_en = 0;
     dut->rs2_addr = 0;
     dut->eval();
-    assert(dut->rs2_val == 0);
+    assert(dut->rs2_rdata == 0);
     std::cout << "[PASS] Write and read (x0) complete" << std::endl;
 
     // Test 4: Dual-port simultaneous read
-    dut->we = 1;
+    dut->reg_write_en = 1;
     dut->rd_addr = 6;
-    dut->rd_val = 0x87654321;
+    dut->rd_wdata = 0x87654321;
     tick(dut);
 
-    dut->we = 1;
+    dut->reg_write_en = 1;
     dut->rd_addr = 7;
-    dut->rd_val = 0x11223344;
+    dut->rd_wdata = 0x11223344;
     tick(dut);
 
     dut->rs1_addr = 6;
     dut->rs2_addr = 7;
     dut->eval();
 
-    assert(dut->rs1_val == 0x87654321 && dut->rs2_val == 0x11223344);
+    assert(dut->rs1_rdata == 0x87654321 && dut->rs2_rdata == 0x11223344);
     std::cout << "[PASS] Dual-port simultaneous read complete" << std::endl;
 
     std::cout << "Register file unit test complete" << std::endl;   
-- 
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