From 15fa51f04bf85239b26fe5bfb424aa38ce2fb888 Mon Sep 17 00:00:00 2001
From: Richard Qin <richard.qin.x@gmail.com>
Date: Wed, 1 Apr 2026 02:35:21 +0800
Subject: feat: Add riscv-arch-test submodule for RISC-V architecture testing

---
 sw/riscv-arch-test | 1 +
 1 file changed, 1 insertion(+)
 create mode 160000 sw/riscv-arch-test

(limited to 'sw/riscv-arch-test')

diff --git a/sw/riscv-arch-test b/sw/riscv-arch-test
new file mode 160000
index 0000000..b27b0cd
--- /dev/null
+++ b/sw/riscv-arch-test
@@ -0,0 +1 @@
+Subproject commit b27b0cd9e00a35b267cebd9a0ce2a6445bc47d64
-- 
cgit v1.2.3