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| author | Richard Qin <richard.qin.x@gmail.com> | 2026-07-10 23:20:03 +0800 |
|---|---|---|
| committer | Richard Qin <richard.qin.x@gmail.com> | 2026-07-10 23:20:03 +0800 |
| commit | 48ef95c24e9ac3d11200b61af617a01b10b507d1 (patch) | |
| tree | 57f0e26ab98e795b19839b6eece98ca58a4b702d /arch/riscv/module.mk | |
| parent | b9ff206e6bd3f4d67851263a6f2acb5f575cf3b0 (diff) | |
| download | lume-48ef95c24e9ac3d11200b61af617a01b10b507d1.tar.gz lume-48ef95c24e9ac3d11200b61af617a01b10b507d1.tar.xz | |
build: introduce declarative non-recursive build graph
Diffstat (limited to 'arch/riscv/module.mk')
| -rw-r--r-- | arch/riscv/module.mk | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/riscv/module.mk b/arch/riscv/module.mk deleted file mode 100644 index 97d22de..0000000 --- a/arch/riscv/module.mk +++ /dev/null @@ -1,18 +0,0 @@ -# arch/riscv/module.mk -SRCS_CC += arch/riscv/mm/pmap.cc -SRCS_CC += arch/riscv/mm/init.cc -SRCS_CC += arch/riscv/config.cc -SRCS_CC += arch/riscv/trap/trap_md.cc -SRCS_CC += arch/riscv/syscall/syscall_md.cc -SRCS_CC += arch/riscv/lib/random.cc -SRCS_CC += arch/riscv/mm/tlb_md.cc -SRCS_S += arch/riscv/kernel/head.S -SRCS_S += arch/riscv/trap/swtch.S -SRCS_S += arch/riscv/trap/fpu.S -SRCS_S += arch/riscv/trap/trap_vector.S -SRCS_S += arch/riscv/uaccess/uaccess_memcpy.S -SRCS_CC += arch/riscv/trap/extable.cc -SRCS_CC += arch/riscv/kernel/signal.cc - -# Arch-specific headers (added to include path) -INCLUDES += -Iarch/riscv/include |