The start of the project -- A MicroDOS

feat: Initial bare-metal RISC-V boot with UART

1 files changed, 47 insertions, 0 deletions

diff --git a/linker.ld b/linker.ld
new file mode 100644
index 0000000..0b01e98
--- /dev/null
+++ b/linker.ld
@@ -0,0 +1,47 @@
+OUTPUT_ARCH( "riscv" )
+ENTRY(_start)
+
+MEMORY
+{
+    ram  (wxa) : ORIGIN = 0x80000000, LENGTH = 128M
+}
+
+SECTIONS
+{
+    . = 0x80000000;
+
+    .text : {
+        PROVIDE(_text_start = .);
+        *(.text.entry)
+        *(.text .text.*)
+        PROVIDE(_text_end = .);
+    } > ram
+
+    .rodata : {
+        . = ALIGN(16);
+        PROVIDE(_rodata_start = .);
+        *(.rodata .rodata.*)
+        PROVIDE(_rodata_end = .);
+    } > ram
+
+    .data : {
+        . = ALIGN(16);
+        PROVIDE(_data_start = .);
+        *(.data .data.*)
+        *(.sdata .sdata.*)
+        PROVIDE(_data_end = .);
+    } > ram
+
+    .bss : {
+        . = ALIGN(16);
+        PROVIDE(_bss_start = .);
+        *(.bss .bss.*)
+        *(.sbss .sbss.*)
+        PROVIDE(_bss_end = .);
+    } > ram
+
+    . = ALIGN(4096);
+    PROVIDE(_stack_top = . + 0x8000);
+    . = . + 0x8000;
+    PROVIDE(_heap_start = .);
+}
\ No newline at end of file