feat: establish bootable new architecture checkpoint

Replace the compressed boot path with a relocatable higher-half RISC-V entry, expand memory and SMP support, and add the driver, TTY, VFS, exec, signal, syscall, initramfs, and self-test infrastructure needed for a bootable kernel checkpoint.

1 files changed, 5 insertions, 3 deletions

diff --git a/na/arch/riscv/module.mk b/na/arch/riscv/module.mk
index af1cc26..97d22de 100644
--- a/na/arch/riscv/module.mk
+++ b/na/arch/riscv/module.mk
@@ -1,16 +1,18 @@
 # arch/riscv/module.mk
 SRCS_CC += arch/riscv/mm/pmap.cc
+SRCS_CC += arch/riscv/mm/init.cc
 SRCS_CC += arch/riscv/config.cc
 SRCS_CC += arch/riscv/trap/trap_md.cc
 SRCS_CC += arch/riscv/syscall/syscall_md.cc
 SRCS_CC += arch/riscv/lib/random.cc
-SRCS_CC += arch/riscv/boot/compressed.cc
-SRCS_CC += arch/riscv/relocate.cc
-SRCS_S  += arch/riscv/boot/entry.S
+SRCS_CC += arch/riscv/mm/tlb_md.cc
+SRCS_S  += arch/riscv/kernel/head.S
 SRCS_S  += arch/riscv/trap/swtch.S
+SRCS_S  += arch/riscv/trap/fpu.S
 SRCS_S  += arch/riscv/trap/trap_vector.S
 SRCS_S  += arch/riscv/uaccess/uaccess_memcpy.S
 SRCS_CC += arch/riscv/trap/extable.cc
+SRCS_CC += arch/riscv/kernel/signal.cc
 
 # Arch-specific headers (added to include path)
 INCLUDES += -Iarch/riscv/include