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| author | Richard Qin <richard.qin.x@gmail.com> | 2026-05-13 16:32:52 +0800 |
|---|---|---|
| committer | Richard Qin <richard.qin.x@gmail.com> | 2026-05-13 16:32:52 +0800 |
| commit | 63dc025705f6533b91fb1a7d26e6ed864efd9900 (patch) | |
| tree | 06472cc416d4efa82425004190bdd2206f4f604c /na/arch/riscv | |
| parent | 70f7108ce05e7e1c0c7d43926dc139237e66f6e6 (diff) | |
| download | lume-63dc025705f6533b91fb1a7d26e6ed864efd9900.tar.gz lume-63dc025705f6533b91fb1a7d26e6ed864efd9900.tar.xz | |
feat: update module.mk files to include additional source files for various subsystems
Diffstat (limited to 'na/arch/riscv')
| -rw-r--r-- | na/arch/riscv/module.mk | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/na/arch/riscv/module.mk b/na/arch/riscv/module.mk index 9635fea..af1cc26 100644 --- a/na/arch/riscv/module.mk +++ b/na/arch/riscv/module.mk @@ -2,10 +2,15 @@ SRCS_CC += arch/riscv/mm/pmap.cc SRCS_CC += arch/riscv/config.cc SRCS_CC += arch/riscv/trap/trap_md.cc +SRCS_CC += arch/riscv/syscall/syscall_md.cc SRCS_CC += arch/riscv/lib/random.cc +SRCS_CC += arch/riscv/boot/compressed.cc +SRCS_CC += arch/riscv/relocate.cc SRCS_S += arch/riscv/boot/entry.S SRCS_S += arch/riscv/trap/swtch.S SRCS_S += arch/riscv/trap/trap_vector.S +SRCS_S += arch/riscv/uaccess/uaccess_memcpy.S +SRCS_CC += arch/riscv/trap/extable.cc # Arch-specific headers (added to include path) INCLUDES += -Iarch/riscv/include |