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authorRichard Qin <richard.qin.x@gmail.com>2026-04-21 23:24:04 +0800
committerRichard Qin <richard.qin.x@gmail.com>2026-04-21 23:24:04 +0800
commit1af2fa49bd6a39aa6a80621e5c21593c19389dba (patch)
tree53cdbb67a22bc7b8123b5fc8234cfe31d3f7199d /na/kernel
parent51899557c770b3dc9bd02579abf491745e607d92 (diff)
downloadlume-1af2fa49bd6a39aa6a80621e5c21593c19389dba.tar.gz
lume-1af2fa49bd6a39aa6a80621e5c21593c19389dba.tar.xz
feat: enhance kernel initialization with FDT parsing and self-test integration
Diffstat (limited to 'na/kernel')
-rw-r--r--na/kernel/main.cc63
1 files changed, 41 insertions, 22 deletions
diff --git a/na/kernel/main.cc b/na/kernel/main.cc
index b4d792e..f566ecf 100644
--- a/na/kernel/main.cc
+++ b/na/kernel/main.cc
@@ -14,7 +14,11 @@
*/
#include <lume/types.h>
+#include <lume/atomic.h>
#include <lume/panic.h>
+#include <lume/fdt.h>
+#include <lume/pmm.h>
+#include <lume/console.h>
#include <arch/cpu.h>
// ============================================================
@@ -29,14 +33,17 @@ void fdt_init(uint64 fdt_paddr); // 2. Parse FDT, build device node table
void pmm_init(); // 3. Buddy allocator ready
void slab_init(); // 4. kmem_cache ready; operator new usable
void vmm_init(); // 5. Fine-grained kernel page table; retire early_pgdir
-void trap_init(); // 6. Set stvec, register IRQ dispatcher
+void trap_init(); // 6. Set trap vector, register IRQ dispatcher
void plic_init(); // 7. Configure PLIC (threshold, priority, enable)
void timer_init(); // 8. Configure timer interrupt (scheduler tick)
void sched_init(); // 9. Create BSP Idle Task, init ready queues
+// Boot self-test runner
+void selftest_run_all();
+
// AP per-CPU init
-void vmm_init_ap(); // Switch satp to BSP-built kernel page table
-void trap_init_ap(); // Set this CPU's stvec
+void vmm_init_ap(); // Switch to BSP-built kernel page table
+void trap_init_ap(); // Set this CPU's trap vector
void plic_init_ap(); // Enable this CPU's PLIC context
void timer_init_ap(); // Start this CPU's timer interrupt
void sched_init_ap(); // Init per-CPU ready queue, create Idle Task
@@ -45,7 +52,7 @@ void sched_init_ap(); // Init per-CPU ready queue, create Idle Tas
// Second-stage synchronization barrier (C++ layer)
// AP cores spin here until BSP finishes all global init.
// ============================================================
-static volatile uint32 ap_boot_sync = 0;
+static lume::atomic<uint32> ap_boot_sync;
// Early UART output functions, defined in lib/panic.cc
// They are safe to use before console_init().
@@ -63,43 +70,52 @@ extern "C" [[noreturn]] void kernel_main(uint64 cpu_id, uint64 fdt_paddr) {
// APs are spinning on ap_boot_sync.
// ========================================================
+ // Early console setup: discover UART via FDT before ANY output.
+ console_early_init(fdt_paddr);
+
+
early_puts("\n\n");
early_puts("====================================\n");
- early_puts(" LumeOS Kernel v0.1 (RISC-V 64)\n");
+ early_puts(" LumeOS Kernel v0.1\n");
early_puts("====================================\n");
early_puts("[boot] BSP online, cpu_id=0\n");
early_puts("[boot] Higher-half kernel active\n");
// --- Subsystem init DAG (strict top-down order) ---
- // 1. UART driver — after this, kernel_panic() can output
- // console_init();
- early_puts("[init] console_init (stub)\n");
// 2. FDT parsing
- // fdt_init(fdt_paddr);
- (void)fdt_paddr;
- early_puts("[init] fdt_init (stub)\n");
+ fdt_init(fdt_paddr);
+ early_puts("[init] fdt_init done\n");
// 3. Physical memory manager (Buddy)
- // pmm_init();
- early_puts("[init] pmm_init (stub)\n");
+ pmm_init();
+ early_puts("[init] pmm_init done\n");
// 4. Slab allocator — operator new usable after this
- // slab_init();
- early_puts("[init] slab_init (stub)\n");
+ slab_init();
+ early_puts("[init] slab_init done\n");
+
+ // 4.5. FDT Phase 2 — build DeviceNode object tree (needs Slab)
+ fdt_unflatten();
+ early_puts("[init] fdt_unflatten done\n");
// 5. Virtual memory manager — retire early_pgdir
- // vmm_init();
- early_puts("[init] vmm_init (stub)\n");
+ vmm_init();
+
+ // 5.5 Drivers MMIO mapping Registration
+ // MUST BE CALLED IMMEDIATELY AFTER vmm_init! Otherwise UART is lost.
+ console_init();
+
+ early_puts("[init] vmm_init & console mapped\n");
- // 6. Trap handler — set stvec
+ // 6. Trap handler — set trap vector
// trap_init();
early_puts("[init] trap_init (stub)\n");
// 7. PLIC interrupt controller
- // plic_init();
- early_puts("[init] plic_init (stub)\n");
+ plic_init();
+ early_puts("[init] plic_init done (mapped)\n");
// 8. Timer interrupt (scheduler tick source)
// timer_init();
@@ -109,11 +125,14 @@ extern "C" [[noreturn]] void kernel_main(uint64 cpu_id, uint64 fdt_paddr) {
// sched_init();
early_puts("[init] sched_init (stub)\n");
+ // 10. Boot self-tests — verify subsystem correctness
+ selftest_run_all();
+
early_puts("[boot] BSP init complete, releasing APs\n");
// Release APs with RELEASE semantics:
// guarantees all global data is visible to APs.
- __atomic_store_n(&ap_boot_sync, 1, __ATOMIC_RELEASE);
+ ap_boot_sync.store(1, __ATOMIC_RELEASE);
// BSP enables interrupts — first timer tick will preempt
// into the scheduler loop.
@@ -125,7 +144,7 @@ extern "C" [[noreturn]] void kernel_main(uint64 cpu_id, uint64 fdt_paddr) {
// ========================================================
// AP: spin until BSP finishes global init
// ========================================================
- while (__atomic_load_n(&ap_boot_sync, __ATOMIC_ACQUIRE) == 0)
+ while (ap_boot_sync.load(__ATOMIC_ACQUIRE) == 0)
;
// --- Per-CPU init only (no global data mutation) ---