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authorRichard Qin <richard.qin.x@gmail.com>2025-12-13 23:21:03 +0800
committerRichard Qin <richard.qin.x@gmail.com>2025-12-13 23:21:03 +0800
commit28fd88e0dd66728b22cd792deb5a1e8636f36ed3 (patch)
tree059cc8350adb68ca994de2c6ccf402895b575d88 /src/drivers/uart.cc
parent27fc7bda593c8bd2c24a334a368772b5f15d4e9e (diff)
downloadlume-28fd88e0dd66728b22cd792deb5a1e8636f36ed3.tar.gz
lume-28fd88e0dd66728b22cd792deb5a1e8636f36ed3.tar.xz
feat: add preemptive scheduling, SBI timer support and FDT parser.
Diffstat (limited to 'src/drivers/uart.cc')
-rw-r--r--src/drivers/uart.cc9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/drivers/uart.cc b/src/drivers/uart.cc
index a81ba3f..367f442 100644
--- a/src/drivers/uart.cc
+++ b/src/drivers/uart.cc
@@ -1,7 +1,8 @@
#include "drivers/uart.h"
#include "common/types.h"
+#include "kernel/config.h"
-#define UART0_BASE 0x10000000L
+// #define UART0_BASE 0x10000000L
#define UART_RBR 0x00 // Receiver Buffer Register (Read)
#define UART_THR 0x00 // Transmitter Holding Register (Write)
@@ -16,11 +17,15 @@
namespace Drivers{
inline volatile uint8_t &reg(uint32_t offset)
{
- return *reinterpret_cast<volatile uint8_t *>(UART0_BASE + offset);
+ return *reinterpret_cast<volatile uint8_t *>(g_uart_base + offset);
}
void uart_init()
{
+
+ if (g_uart_base == 0)
+ return;
+
reg(UART_IER) = 0x00;
reg(UART_LCR) = 0x80;