diff options
Diffstat (limited to 'na')
| -rw-r--r-- | na/arch/riscv/boot/entry.S | 19 | ||||
| -rw-r--r-- | na/arch/riscv/include/arch/config.h | 28 |
2 files changed, 41 insertions, 6 deletions
diff --git a/na/arch/riscv/boot/entry.S b/na/arch/riscv/boot/entry.S index 895c778..f53a4c8 100644 --- a/na/arch/riscv/boot/entry.S +++ b/na/arch/riscv/boot/entry.S @@ -20,9 +20,10 @@ * Reference: docs/specs/linker_and_entry.md */ +#include <lume/config.h> + #define PAGE_OFFSET 0xFFFFFFC000000000 #define BOOT_STACK_SIZE 8192 -#define NCPU_MAX 8 /* SV39 PTE flags */ #define PTE_V (1 << 0) /* Valid */ @@ -192,18 +193,24 @@ real_start: /* ---- 6.3: Jump to higher-half virtual address ---- */ /* Now we are executing via the identity map (PA == VA for 0x8...). - * Load the VA of the next instruction and jump there, - * so PC switches from physical to virtual address space. */ + * `la` is PC-relative (medany), so it yields a PHYSICAL address. + * We must add PAGE_OFFSET to convert to the higher-half VA. */ la t0, .Lhigher_half + li t1, PAGE_OFFSET + add t0, t0, t1 jr t0 .Lhigher_half: /* We are now running at virtual addresses (0xFFFFFFC0...) ! * The identity map is still active but will be removed by vmm_init(). */ - /* ---- 6.4: Reload sp with virtual address ---- */ - /* Boot stack was set up using physical-linked VA already (linker placed - * boot_stack in higher-half), so sp is valid. Reload gp just in case. */ + /* ---- 6.4: Fix sp and gp to virtual addresses ---- */ + /* sp was set up before MMU using PC-relative `la`, so it holds a + * physical address. Add PAGE_OFFSET to convert to higher-half VA. + * gp is similarly reloaded — now that PC is at VA, `la` resolves + * correctly via PC-relative addressing. */ + li t0, PAGE_OFFSET + add sp, sp, t0 .option push .option norelax la gp, __global_pointer$ diff --git a/na/arch/riscv/include/arch/config.h b/na/arch/riscv/include/arch/config.h new file mode 100644 index 0000000..2a70f2a --- /dev/null +++ b/na/arch/riscv/include/arch/config.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright (C) 2026 Richard Qin */ + +#pragma once + +/* + * RISC-V Architecture Configuration + * + * These constants define the architecture-specific memory layout. + * Each arch/ implementation must provide this header with the same symbols. + */ + +#include <lume/types.h> + +namespace arch { + +/* Kernel virtual address offset (higher-half base). + * SV39: top of 39-bit VA space. VA = PA + kVAOffset. */ +inline constexpr uint64 kVAOffset = 0xFFFFFFC000000000ULL; + +/* Physical memory base (where RAM starts on RISC-V virt platform) */ +inline constexpr uint64 kPhysBase = 0x80000000ULL; + +/* Platform default MMIO base addresses (QEMU virt) */ +inline constexpr uint64 kDefaultUartPA = 0x10000000ULL; +inline constexpr uint64 kDefaultPlicPA = 0x0C000000ULL; + +} // namespace arch |