lume - A general-purpose operating system with Linux ABI compatibility

	Commit message (Collapse)	Author	Age	Files	Lines
*	dev(shell): implement basic shell tools	Richard Qin	2026-01-04	1	-0/+0
\| \| \| \|	fixed(file-system): fixed read and write bugs
*	feat(file-system): implement read and write FAT32 File System and basic shell	Richard Qin	2026-01-04	1	-0/+0
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*	Fix: critical malloc size calculation bug	Richard Qin	2026-01-03	1	-0/+0
\| \| \| \| \| \| \| \| \| \|	Summary: - Fixed an integer arithmetic error in malloc() where 'nunits' was initialized to 0, causing incorrect heap sizing. - This bug caused malloc to return pointers pointing to unmapped memory pages, leading to Store Page Fault (scause 15) at process boundaries. - Switched memory allocator logic to use byte-based size calculation instead of K&R style units to prevent off-by-one errors. Improvements: - Shell now starts successfully without segfaults.
*	dev(sell): add simple libc and implement shell	Richard Qin	2026-01-02	1	-0/+0
\| \| \| \|	please see the log for detail.
*	dev(device): implement VirtIO	Richard Qin	2026-01-01	1	-0/+0
\| \| \| \|	See dev log for detail
*	dev: PILC implementation	Richard Qin	2025-12-31	1	-0/+0
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*	dev:Refactor Memory Management and Process Management	Richard Qin	2025-12-31	1	-0/+0
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*	feat(syscall): Implement syscall dispatch and process lifecycle ↵	Richard Qin	2025-12-28	1	-0/+0
\| \| \| \|	(exit/wait/sleep)
*	feat: Implement the first user program of the lume OS	Richard Qin	2025-12-27	1	-0/+0
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*	feat: add preemptive scheduling, SBI timer support and FDT parser.	Richard Qin	2025-12-13	1	-0/+0
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*	feat:Cooperative Multitasking	Richard Qin	2025-12-11	1	-0/+0
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*	feat: Add initial Supervisor Mode Trap Handler	Richard Qin	2025-12-10	1	-0/+0
	Implement the initial mechanism for handling traps and exceptions in Supervisor Mode. Set up the stvec Control and Status Register (CSR) to direct all S-Mode Traps (Interrupts and Exceptions) to a unified assembly entry point. Implemented assembly code for saving and restoring the Trap Context (register state). Provides the foundational framework necessary for future Timer Interrupts and System Calls.