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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-01 16:07:24 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-01 16:07:24 +0800 |
| commit | 924dcd36ebed84f04729de05ec08b311a36a04c1 (patch) | |
| tree | 300af742968d4d48915ef178855741f7087fc979 /backend/include/rcc/CodeGen/MachineIRBuilder.h | |
| parent | cfdbcc469f9691bd9dce3b0b86982a63d86ca6b7 (diff) | |
| download | rcc-project-924dcd36ebed84f04729de05ec08b311a36a04c1.tar.gz rcc-project-924dcd36ebed84f04729de05ec08b311a36a04c1.tar.xz | |
[CodeGen] Add target register descriptions
Introduce an immutable register topology for units, subregisters, classes, banks, and preserved masks. Bind instruction descriptors to this topology through TargetDescription so builders, cloning, and verification share one target-aware contract. Add the test-only TestTarget model and positive and negative target fact coverage.
Diffstat (limited to 'backend/include/rcc/CodeGen/MachineIRBuilder.h')
| -rw-r--r-- | backend/include/rcc/CodeGen/MachineIRBuilder.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/backend/include/rcc/CodeGen/MachineIRBuilder.h b/backend/include/rcc/CodeGen/MachineIRBuilder.h index 47fd63c..08ec9ba 100644 --- a/backend/include/rcc/CodeGen/MachineIRBuilder.h +++ b/backend/include/rcc/CodeGen/MachineIRBuilder.h @@ -3,10 +3,10 @@ #ifndef RCC_CODEGEN_MACHINEIRBUILDER_H #define RCC_CODEGEN_MACHINEIRBUILDER_H -#include "rcc/CodeGen/InstructionDescriptor.h" #include "rcc/CodeGen/MachineIRTypes.h" #include "rcc/CodeGen/MachineOperand.h" #include "rcc/CodeGen/Register.h" +#include "rcc/CodeGen/TargetDescription.h" #include "rcc/Support/Error.h" #include <cstddef> @@ -90,7 +90,7 @@ public: [[nodiscard]] Expected<MachineInstr *> build(); private: - MachineInstrBuilder(MachineFunction &Function, const InstructionSet &Instructions, + MachineInstrBuilder(MachineFunction &Function, const TargetDescription &Target, const InstructionDescriptor &Descriptor, MachineBasicBlock &InsertBlock, MachineInstr *InsertBefore) noexcept; @@ -106,7 +106,7 @@ private: bool IsImplicit); MachineFunction *Function; - const InstructionSet *Instructions; + const TargetDescription *Target; const InstructionDescriptor *Descriptor; MachineBasicBlock *InsertBlock; MachineInstr *InsertBefore; @@ -124,8 +124,8 @@ private: class MachineIRBuilder final { public: - MachineIRBuilder(MachineFunction &Function, const InstructionSet &Instructions) noexcept - : Function(&Function), Instructions(&Instructions) {} + MachineIRBuilder(MachineFunction &Function, const TargetDescription &Target) noexcept + : Function(&Function), Target(&Target) {} MachineIRBuilder(const MachineIRBuilder &) = delete; MachineIRBuilder &operator=(const MachineIRBuilder &) = delete; MachineIRBuilder(MachineIRBuilder &&) = delete; @@ -154,7 +154,7 @@ private: [[nodiscard]] Expected<void> validateInstruction(const MachineInstr &Instruction) const; MachineFunction *Function; - const InstructionSet *Instructions; + const TargetDescription *Target; MachineBasicBlock *InsertBlock = nullptr; MachineInstr *InsertBefore = nullptr; }; |
