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authorRichard-Qin-X <richard.qin.001@gmail.com>2026-08-01 05:27:13 +0800
committerRichard-Qin-X <richard.qin.001@gmail.com>2026-08-01 05:27:13 +0800
commitc759cebef15bdac2ef160065efd116fe6ed540a7 (patch)
tree28fe46f32bebc7b0ba67f38d04e01e9e6cd272e7 /backend/include/rcc/CodeGen/MachineInstr.h
parente2505772ab260c79d0075728082c907a90dab7ca (diff)
downloadrcc-project-c759cebef15bdac2ef160065efd116fe6ed540a7.tar.gz
rcc-project-c759cebef15bdac2ef160065efd116fe6ed540a7.tar.xz
[CodeGen] Build the core MachineIR object model
Add arena-owned, address-stable MachineFunction, MachineBasicBlock, and MachineInstr nodes with intrusive layout and instruction lists. Model every required MachineOperand category, reciprocal ties, source state, and immutable per-instruction memory references. Implement physical and virtual register def-use chains whose back-links survive operand vector moves, plus vreg properties, tombstones, live-ins, reserved registers, and atomic CFG updates. Exercise ownership, reallocation, unlink/relink, cross-function rejection, and sanitizer paths.
Diffstat (limited to 'backend/include/rcc/CodeGen/MachineInstr.h')
-rw-r--r--backend/include/rcc/CodeGen/MachineInstr.h164
1 files changed, 164 insertions, 0 deletions
diff --git a/backend/include/rcc/CodeGen/MachineInstr.h b/backend/include/rcc/CodeGen/MachineInstr.h
new file mode 100644
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+++ b/backend/include/rcc/CodeGen/MachineInstr.h
@@ -0,0 +1,164 @@
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#ifndef RCC_CODEGEN_MACHINEINSTR_H
+#define RCC_CODEGEN_MACHINEINSTR_H
+
+#include "rcc/CodeGen/MachineIRTypes.h"
+#include "rcc/CodeGen/MachineOperand.h"
+#include "rcc/CodeGen/StableID.h"
+#include "rcc/Support/Error.h"
+
+#include <cstddef>
+#include <functional>
+#include <optional>
+#include <span>
+#include <utility>
+#include <vector>
+
+namespace rcc {
+
+class MachineBasicBlock;
+class MachineFunction;
+class MachineMemOperand;
+class MachineRegisterInfo;
+
+class MachineInstr final {
+public:
+ MachineInstr(const MachineInstr &) = delete;
+ MachineInstr &operator=(const MachineInstr &) = delete;
+ MachineInstr(MachineInstr &&) = delete;
+ MachineInstr &operator=(MachineInstr &&) = delete;
+ ~MachineInstr();
+
+ [[nodiscard]] Opcode opcode() const noexcept {
+ return InstructionOpcode;
+ }
+
+ [[nodiscard]] Expected<void> setOpcode(Opcode NewOpcode);
+
+ [[nodiscard]] MachineInstrStableID stableID() const noexcept {
+ return StableID;
+ }
+
+ [[nodiscard]] MachineFunction &function() noexcept {
+ return *OwnerFunction;
+ }
+
+ [[nodiscard]] const MachineFunction &function() const noexcept {
+ return *OwnerFunction;
+ }
+
+ [[nodiscard]] MachineBasicBlock *parent() noexcept {
+ return ParentBlock;
+ }
+
+ [[nodiscard]] const MachineBasicBlock *parent() const noexcept {
+ return ParentBlock;
+ }
+
+ [[nodiscard]] MachineInstr *previous() noexcept {
+ return PreviousInstruction;
+ }
+
+ [[nodiscard]] const MachineInstr *previous() const noexcept {
+ return PreviousInstruction;
+ }
+
+ [[nodiscard]] MachineInstr *next() noexcept {
+ return NextInstruction;
+ }
+
+ [[nodiscard]] const MachineInstr *next() const noexcept {
+ return NextInstruction;
+ }
+
+ [[nodiscard]] bool isLinked() const noexcept {
+ return ParentBlock != nullptr;
+ }
+
+ [[nodiscard]] std::size_t operandCount() const noexcept {
+ return Operands.size();
+ }
+
+ [[nodiscard]] MachineOperand *operandAt(std::size_t Index) noexcept;
+ [[nodiscard]] const MachineOperand *operandAt(std::size_t Index) const noexcept;
+ [[nodiscard]] std::span<const MachineOperand> operands() const noexcept {
+ return Operands;
+ }
+
+ void reserveOperands(std::size_t Capacity);
+ [[nodiscard]] Expected<void> addOperand(MachineOperand Operand);
+ [[nodiscard]] Expected<void> insertOperand(std::size_t Index, MachineOperand Operand);
+ [[nodiscard]] Expected<void> eraseOperand(std::size_t Index);
+
+ [[nodiscard]] Expected<void> tieOperands(std::size_t DefIndex, std::size_t UseIndex);
+ [[nodiscard]] Expected<void> untieOperand(std::size_t Index);
+
+ [[nodiscard]] Expected<void> addMemOperand(const MachineMemOperand &MemOperand);
+ [[nodiscard]] Expected<void> eraseMemOperand(std::size_t Index);
+ [[nodiscard]] std::span<const MachineMemOperand *const> memOperands() const noexcept {
+ return MemOperands;
+ }
+
+ [[nodiscard]] MachineInstrFlags flags() const noexcept {
+ return Flags;
+ }
+
+ void setFlags(MachineInstrFlags NewFlags) noexcept {
+ Flags = NewFlags;
+ }
+
+ [[nodiscard]] const std::optional<SourceLocation> &sourceLocation() const noexcept {
+ return Location;
+ }
+
+ void setSourceLocation(SourceLocation NewLocation) {
+ Location = std::move(NewLocation);
+ }
+
+ void clearSourceLocation() noexcept {
+ Location.reset();
+ }
+
+ [[nodiscard]] std::optional<OriginID> origin() const noexcept {
+ return Origin;
+ }
+
+ void setOrigin(OriginID NewOrigin) noexcept {
+ Origin = NewOrigin;
+ }
+
+ void clearOrigin() noexcept {
+ Origin.reset();
+ }
+
+private:
+ MachineInstr(MachineFunction &OwnerFunction, Opcode InstructionOpcode,
+ MachineInstrStableID StableID);
+
+ [[nodiscard]] MachineRegisterInfo *linkedRegisterInfo() noexcept;
+ [[nodiscard]] Expected<void> attachToBlock(MachineBasicBlock &Block);
+ void detachFromBlock() noexcept;
+ void adjustTiesForInsertion(std::size_t Index) noexcept;
+ void adjustTiesForErasure(std::size_t Index) noexcept;
+
+ MachineFunction *OwnerFunction;
+ Opcode InstructionOpcode;
+ MachineInstrStableID StableID;
+ MachineBasicBlock *ParentBlock = nullptr;
+ MachineInstr *PreviousInstruction = nullptr;
+ MachineInstr *NextInstruction = nullptr;
+ std::vector<MachineOperand> Operands;
+ std::vector<const MachineMemOperand *> MemOperands;
+ MachineInstrFlags Flags;
+ std::optional<SourceLocation> Location;
+ std::optional<OriginID> Origin;
+
+ friend class MachineArena;
+ friend class MachineBasicBlock;
+ friend class MachineFunction;
+};
+
+} // namespace rcc
+
+#endif // RCC_CODEGEN_MACHINEINSTR_H