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authorRichard-Qin-X <richard.qin.001@gmail.com>2026-08-07 01:27:41 +0800
committerRichard-Qin-X <richard.qin.001@gmail.com>2026-08-07 01:27:41 +0800
commit76d89700953ddd81cf31ab8f260eddf67e93aa85 (patch)
treec96a453164154b2d1559cea36910df52103f0f19 /backend/include/rcc/CodeGen/MachineOperand.h
parent183e2354e9fdd107be420cbb185c1d239434aa48 (diff)
downloadrcc-project-76d89700953ddd81cf31ab8f260eddf67e93aa85.tar.gz
rcc-project-76d89700953ddd81cf31ab8f260eddf67e93aa85.tar.xz
[MIR] Complete document parsing and printing
Implement the single LLVM-compatible MIR document path with structured\nembedded-IR references, YAML mappings, constants, and deterministic printing.\n\nKeep pointer LLT widths DataLayout-derived, reject layout-dependent output\nwhen embedded IR is omitted, and record the fixed-baseline compatibility\ncontract and regression coverage.
Diffstat (limited to 'backend/include/rcc/CodeGen/MachineOperand.h')
-rw-r--r--backend/include/rcc/CodeGen/MachineOperand.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/backend/include/rcc/CodeGen/MachineOperand.h b/backend/include/rcc/CodeGen/MachineOperand.h
index 7344932..b8a6dcc 100644
--- a/backend/include/rcc/CodeGen/MachineOperand.h
+++ b/backend/include/rcc/CodeGen/MachineOperand.h
@@ -69,6 +69,8 @@ public:
std::uint64_t Value);
[[nodiscard]] static Expected<IntegerImmediate> fromSigned(std::uint32_t BitWidth,
std::int64_t Value);
+ [[nodiscard]] static Expected<IntegerImmediate> parseDecimal(std::uint32_t BitWidth,
+ std::string_view Text);
[[nodiscard]] std::uint32_t bitWidth() const noexcept {
return BitWidth;
@@ -80,6 +82,7 @@ public:
[[nodiscard]] bool isZero() const noexcept;
[[nodiscard]] bool isNegative() const noexcept;
+ [[nodiscard]] std::string toUnsignedDecimal() const;
[[nodiscard]] Expected<void> verify() const;
friend bool operator==(const IntegerImmediate &Left, const IntegerImmediate &Right) = default;