[RISCV] Match LLVM register bank mappings

1 files changed, 17 insertions, 5 deletions

diff --git a/backend/include/rcc/CodeGen/RegisterBankInfo.h b/backend/include/rcc/CodeGen/RegisterBankInfo.h
index 70b7340..bc918cc 100644
--- a/backend/include/rcc/CodeGen/RegisterBankInfo.h
+++ b/backend/include/rcc/CodeGen/RegisterBankInfo.h
@@ -7,6 +7,9 @@
 #include "rcc/CodeGen/Register.h"
 #include "rcc/Support/Error.h"
 
+#include <optional>
+#include <vector>
+
 namespace rcc {
 
 class MachineFunction;
@@ -14,19 +17,28 @@ class MachineInstr;
 class TargetDescription;
 struct VirtualRegisterInfo;
 
+struct RegisterBankSelection final {
+  RegisterBankID Bank;
+  bool IsConstrained = false;
+};
+
+using RegisterBankInstructionMapping = std::vector<std::optional<RegisterBankID>>;
+
 class RegisterBankInfo {
 public:
   virtual ~RegisterBankInfo() = default;
 
-  [[nodiscard]] virtual Expected<RegisterBankID>
+  [[nodiscard]] virtual Expected<RegisterBankSelection>
   selectBank(const MachineFunction &Function, Register Reg, const VirtualRegisterInfo &Info,
              const MachineInstr *Context, const TargetDescription &Target) const = 0;
 
-  [[nodiscard]] virtual Expected<void>
-  constrainInstruction(MachineInstr &Instruction, MachineFunction &Function,
-                       const TargetDescription &Target) const = 0;
+  [[nodiscard]] virtual Expected<RegisterBankInstructionMapping>
+  getInstructionMapping(const MachineInstr &, const MachineFunction &,
+                        const TargetDescription &) const {
+    return RegisterBankInstructionMapping{};
+  }
 
-  // This hook rejects invalid mappings before bank or register-class state is published.
+  // This hook rejects invalid mappings before register-bank state is published.
   [[nodiscard]] virtual Expected<void> validateInstruction(const MachineInstr &,
                                                            const MachineFunction &,
                                                            const TargetDescription &) const {