[CodeGen] Add machine IR value semantics

Add strongly typed machine indices, lane masks, instruction flags, fixed-point branch probabilities, and preserved-register masks.

Model immutable machine memory operands with explicit base identity, size, alignment, address space, alias information, and validated atomic operation and ordering rules. Cover normal, boundary, and invalid combinations in standalone tests.

1 files changed, 39 insertions, 0 deletions

diff --git a/backend/include/rcc/CodeGen/RegisterMask.h b/backend/include/rcc/CodeGen/RegisterMask.h
new file mode 100644
index 0000000..d5a5b71
--- /dev/null
+++ b/backend/include/rcc/CodeGen/RegisterMask.h
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#ifndef RCC_CODEGEN_REGISTERMASK_H
+#define RCC_CODEGEN_REGISTERMASK_H
+
+#include "rcc/CodeGen/Register.h"
+
+#include <cstddef>
+#include <cstdint>
+#include <span>
+#include <utility>
+#include <vector>
+
+namespace rcc {
+
+class RegisterMask final {
+public:
+  explicit RegisterMask(std::vector<std::uint64_t> PreservedWords)
+      : PreservedWords(std::move(PreservedWords)) {}
+
+  [[nodiscard]] bool preserves(PhysicalRegister PhysReg) const noexcept;
+
+  [[nodiscard]] bool clobbers(PhysicalRegister PhysReg) const noexcept {
+    return !preserves(PhysReg);
+  }
+
+  [[nodiscard]] std::span<const std::uint64_t> words() const noexcept {
+    return PreservedWords;
+  }
+
+  friend bool operator==(const RegisterMask &Left, const RegisterMask &Right) = default;
+
+private:
+  std::vector<std::uint64_t> PreservedWords;
+};
+
+} // namespace rcc
+
+#endif // RCC_CODEGEN_REGISTERMASK_H