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authorRichard-Qin-X <richard.qin.001@gmail.com>2026-08-24 16:48:50 +0800
committerRichard-Qin-X <richard.qin.001@gmail.com>2026-08-24 16:48:50 +0800
commit47d0d5140b4616ae4dd7c6d2c3c089ccbfc3b009 (patch)
tree363cb222cb041dc2aee5e2cce4df5adb0fd64d3e /backend/include/rcc/CodeGen
parent540c73a2f450af3d0aec6e039fab054471efdbb1 (diff)
downloadrcc-project-47d0d5140b4616ae4dd7c6d2c3c089ccbfc3b009.tar.gz
rcc-project-47d0d5140b4616ae4dd7c6d2c3c089ccbfc3b009.tar.xz
[CodeGen] Match LLVM machine combiner semantics
Diffstat (limited to 'backend/include/rcc/CodeGen')
-rw-r--r--backend/include/rcc/CodeGen/MachineCombiner.h5
-rw-r--r--backend/include/rcc/CodeGen/MachineCombinerPattern.h47
2 files changed, 6 insertions, 46 deletions
diff --git a/backend/include/rcc/CodeGen/MachineCombiner.h b/backend/include/rcc/CodeGen/MachineCombiner.h
index 3850b91..42ca301 100644
--- a/backend/include/rcc/CodeGen/MachineCombiner.h
+++ b/backend/include/rcc/CodeGen/MachineCombiner.h
@@ -17,9 +17,9 @@ struct MachineCombinerOptions final {
class MachineCombinerPass final : public MachineFunctionPass {
public:
- MachineCombinerPass(const TargetMachineCombinerInfo &Info, MachineCombinerStage Stage,
+ MachineCombinerPass(const TargetMachineCombinerInfo &Info,
MachineCombinerOptions Options = {}) noexcept
- : Info(&Info), Stage(Stage), Options(Options) {}
+ : Info(&Info), Options(Options) {}
[[nodiscard]] const MachinePassContract &contract() const noexcept override;
[[nodiscard]] Expected<MachinePassResult> run(MachineFunction &Function,
@@ -32,7 +32,6 @@ private:
MachineActionReplay &Actions) const;
const TargetMachineCombinerInfo *Info;
- MachineCombinerStage Stage;
MachineCombinerOptions Options;
};
diff --git a/backend/include/rcc/CodeGen/MachineCombinerPattern.h b/backend/include/rcc/CodeGen/MachineCombinerPattern.h
index 62819ef..3d590f9 100644
--- a/backend/include/rcc/CodeGen/MachineCombinerPattern.h
+++ b/backend/include/rcc/CodeGen/MachineCombinerPattern.h
@@ -7,7 +7,6 @@
#include "rcc/Support/Error.h"
#include <cstddef>
-#include <cstdint>
#include <span>
#include <string>
#include <unordered_map>
@@ -15,51 +14,13 @@
namespace rcc {
-enum class MachineCombinerStage : std::uint8_t {
- PreLegalizer,
- SelectedSSA,
- PreRegisterAllocation,
- PostRegisterAllocation,
-};
-
-using MachineCombinerStageMask = std::uint8_t;
-
-[[nodiscard]] constexpr MachineCombinerStageMask
-machineCombinerStageMask(MachineCombinerStage Stage) noexcept {
- return static_cast<MachineCombinerStageMask>(1U << static_cast<std::uint8_t>(Stage));
-}
-
-enum class MachineCombinerPredicateKind : std::uint8_t {
- ImmediateEquals,
- RegisterEquals,
- PhysicalRegisterEquals,
- RegisterIsVirtual,
- RegisterIsPhysical,
-};
-
-struct MachineCombinerPredicate final {
- MachineCombinerPredicateKind Kind = MachineCombinerPredicateKind::ImmediateEquals;
- std::size_t Operand = 0;
- std::size_t OtherOperand = 0;
- std::int64_t Value = 0;
-};
-
-enum class MachineCombinerActionKind : std::uint8_t {
- ReplaceDefWithOperandAndErase,
-};
-
-struct MachineCombinerAction final {
- MachineCombinerActionKind Kind = MachineCombinerActionKind::ReplaceDefWithOperandAndErase;
- std::size_t DefinitionOperand = 0;
- std::size_t SourceOperand = 0;
-};
-
struct MachineCombinerPattern final {
std::string Name;
Opcode RootOpcode;
- MachineCombinerStageMask Stages = 0;
- std::vector<MachineCombinerPredicate> Predicates;
- MachineCombinerAction Action;
+ Opcode ProducerOpcode;
+ Opcode ReplacementOpcode;
+ std::size_t ProducerOperand = 0;
+ std::size_t AddendOperand = 0;
};
class TargetMachineCombinerInfo final {