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authorRichard-Qin-X <richard.qin.001@gmail.com>2026-08-09 13:23:48 +0800
committerRichard-Qin-X <richard.qin.001@gmail.com>2026-08-09 13:23:48 +0800
commitda8bc76b4bf7d1a7b025d6c8ef5809551467dcc7 (patch)
tree3b64eb08cd6376deceef2d7bac20eea5ce4de184 /backend/include/rcc/Target/RISCV/RISCVCodeGen.h
parente5fdceb9b869f010a2a75638fd38aaf1867f3008 (diff)
downloadrcc-project-da8bc76b4bf7d1a7b025d6c8ef5809551467dcc7.tar.gz
rcc-project-da8bc76b4bf7d1a7b025d6c8ef5809551467dcc7.tar.xz
[CodeGen] Implement RV64GC frame lowering
Diffstat (limited to 'backend/include/rcc/Target/RISCV/RISCVCodeGen.h')
-rw-r--r--backend/include/rcc/Target/RISCV/RISCVCodeGen.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/backend/include/rcc/Target/RISCV/RISCVCodeGen.h b/backend/include/rcc/Target/RISCV/RISCVCodeGen.h
index 403bb2d..0cec77d 100644
--- a/backend/include/rcc/Target/RISCV/RISCVCodeGen.h
+++ b/backend/include/rcc/Target/RISCV/RISCVCodeGen.h
@@ -4,6 +4,7 @@
#define RCC_TARGET_RISCV_RISCVCODEGEN_H
#include "rcc/CodeGen/TargetCodeGen.h"
+#include "rcc/CodeGen/TargetFrameLowering.h"
#include "rcc/CodeGen/TargetRegisterAllocationInfo.h"
namespace rcc::riscv {
@@ -13,6 +14,7 @@ namespace rcc::riscv {
[[nodiscard]] const TargetInstructionSelector &instructionSelector() noexcept;
[[nodiscard]] const TargetSSAInfo &ssaInfo() noexcept;
[[nodiscard]] const TargetRegisterAllocationInfo &registerAllocationInfo() noexcept;
+[[nodiscard]] const TargetFrameLowering &frameLowering() noexcept;
} // namespace rcc::riscv