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authorRichard-Qin-X <richard.qin.001@gmail.com>2026-08-25 03:11:23 +0800
committerRichard-Qin-X <richard.qin.001@gmail.com>2026-08-25 03:11:23 +0800
commitf5d9ddc085055d28d6f9fb3730c3566097f43fb2 (patch)
treed1ca89a409a0d1a167e79e3d1693c22bcfd823a9 /backend/lib/CodeGen/MIRPrinter.cpp
parentc3932f55208e3fe2019d26a0e5af421c0b644872 (diff)
downloadrcc-project-f5d9ddc085055d28d6f9fb3730c3566097f43fb2.tar.gz
rcc-project-f5d9ddc085055d28d6f9fb3730c3566097f43fb2.tar.xz
[CodeGen] Implement the greedy register allocator pipeline
Diffstat (limited to 'backend/lib/CodeGen/MIRPrinter.cpp')
-rw-r--r--backend/lib/CodeGen/MIRPrinter.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/backend/lib/CodeGen/MIRPrinter.cpp b/backend/lib/CodeGen/MIRPrinter.cpp
index 3708053..2a6ddb4 100644
--- a/backend/lib/CodeGen/MIRPrinter.cpp
+++ b/backend/lib/CodeGen/MIRPrinter.cpp
@@ -493,7 +493,7 @@ MIRDocumentPrinter::createBodyContext(const MachineFunction &Function) const {
std::uint32_t FixedID = 0;
for (const StackObject &Object : Function.frameInfo().objects()) {
const StackObjectDesc *Description = Object.description();
- if (Description == nullptr)
+ if (Description == nullptr || Description->IsDead)
continue;
MIFrameObjectSlot Slot{
.TextID = Object.isFixed() ? FixedID++ : StackID++,