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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-13 21:11:10 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-13 21:11:10 +0800 |
| commit | cd30fb546e389d1fb78ce8e579b3dba3a8fdb52a (patch) | |
| tree | 891d7065c52e56d3f559b146f3a07055105d9d4e /backend/lib/CodeGen/MachineOperand.cpp | |
| parent | 98cae0e8835a1eb8fcb0e43870c04ed934cc51ac (diff) | |
| download | rcc-project-cd30fb546e389d1fb78ce8e579b3dba3a8fdb52a.tar.gz rcc-project-cd30fb546e389d1fb78ce8e579b3dba3a8fdb52a.tar.xz | |
[CodeGen] Match LLVM machine copy propagation
Diffstat (limited to 'backend/lib/CodeGen/MachineOperand.cpp')
| -rw-r--r-- | backend/lib/CodeGen/MachineOperand.cpp | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/backend/lib/CodeGen/MachineOperand.cpp b/backend/lib/CodeGen/MachineOperand.cpp index 44ad8b6..9b54bb9 100644 --- a/backend/lib/CodeGen/MachineOperand.cpp +++ b/backend/lib/CodeGen/MachineOperand.cpp @@ -315,6 +315,26 @@ Expected<void> MachineOperand::setRegister(Register Reg) { return {}; } +Expected<void> MachineOperand::changeToImmediate(std::int64_t Value) { + if (!isRegister() || isImplicit() || isDef() || tiedOperandIndex()) { + return makeUnexpected(ErrorCode::InvalidArgument, + "only an untied explicit register use can become an immediate"); + } + unlinkFromRegInfo(); + OperandKind = Kind::Immediate; + Storage = Value; + RegFlags = {}; + RegSubReg = {}; + return {}; +} + +Expected<void> MachineOperand::setImmediate(std::int64_t Value) { + if (OperandKind != Kind::Immediate) + return makeUnexpected(ErrorCode::InvalidArgument, "setImmediate requires an immediate operand"); + Storage = Value; + return {}; +} + Expected<void> MachineOperand::setRegisterFlags(RegisterOperandFlags Flags) { if (!isRegister()) { return makeUnexpected(ErrorCode::InvalidArgument, "register flags require a register operand"); |
