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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-01 13:24:09 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-01 13:24:09 +0800 |
| commit | 19d8e4f562a8583b002dbaa837ec0083e7768a4f (patch) | |
| tree | d8525d05d65c69c81076b8cdafdf0bfd400d4053 /backend/lib/CodeGen/MachineRegisterInfo.cpp | |
| parent | 8553df97bbc6154dae9d0ad861857e71a0efa420 (diff) | |
| download | rcc-project-19d8e4f562a8583b002dbaa837ec0083e7768a4f.tar.gz rcc-project-19d8e4f562a8583b002dbaa837ec0083e7768a4f.tar.xz | |
[CodeGen] Add strict MachineIR verification
Verify arena catalogs, intrusive layouts, reciprocal CFG edges, operand ownership, exact def-use coverage, instruction descriptors, pseudo deadlines, and MachineFunctionProperties. Preserve monotonic-arena history while rejecting detached objects that retain live state.
Diffstat (limited to 'backend/lib/CodeGen/MachineRegisterInfo.cpp')
| -rw-r--r-- | backend/lib/CodeGen/MachineRegisterInfo.cpp | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/backend/lib/CodeGen/MachineRegisterInfo.cpp b/backend/lib/CodeGen/MachineRegisterInfo.cpp index cc0955e..c31b38b 100644 --- a/backend/lib/CodeGen/MachineRegisterInfo.cpp +++ b/backend/lib/CodeGen/MachineRegisterInfo.cpp @@ -2,6 +2,8 @@ #include "rcc/CodeGen/MachineRegisterInfo.h" +#include "rcc/CodeGen/MachineFunction.h" +#include "rcc/CodeGen/MachineInstr.h" #include "rcc/CodeGen/MachineOperand.h" #include <algorithm> @@ -312,6 +314,16 @@ Expected<void> MachineRegisterInfo::verifyDefUseChains() const { std::unordered_set<const MachineOperand *> SeenOperands; for (const auto &[Reg, HeadStorage] : DefUseHeads) { + if (!HeadStorage) { + return makeUnexpected(ErrorCode::VerificationError, + "register def-use table contains null head storage"); + } + if (HeadStorage->Head == nullptr) + continue; + if (Reg.isNoRegister() || (Reg.isVirtual() && !isKnownVirtualRegister(Reg))) { + return makeUnexpected(ErrorCode::VerificationError, + "register def-use chain is keyed by an invalid register"); + } MachineOperand *const *ExpectedPreviousLink = &HeadStorage->Head; for (MachineOperand *Operand = HeadStorage->Head; Operand != nullptr; Operand = Operand->NextRegOperand) { @@ -327,6 +339,12 @@ Expected<void> MachineRegisterInfo::verifyDefUseChains() const { return makeUnexpected(ErrorCode::VerificationError, "register def-use chain back-link is corrupt"); } + if (Operand->Parent == nullptr || !Operand->Parent->isLinked() || + &Operand->Parent->function().registerInfo() != this) { + return makeUnexpected( + ErrorCode::VerificationError, + "register def-use chain contains an operand outside its function layout"); + } ExpectedPreviousLink = &Operand->NextRegOperand; } } @@ -334,6 +352,10 @@ Expected<void> MachineRegisterInfo::verifyDefUseChains() const { return {}; } +bool MachineRegisterInfo::isLinkedOperand(const MachineOperand &Operand) const noexcept { + return Operand.LinkedRegInfo == this && Operand.PreviousRegLink != nullptr; +} + MachineOperand *MachineRegisterInfo::headFor(Register Reg) const noexcept { const auto Position = DefUseHeads.find(Reg); if (Position == DefUseHeads.end()) |
