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| author | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-19 17:25:55 +0800 |
|---|---|---|
| committer | Richard-Qin-X <richard.qin.001@gmail.com> | 2026-08-19 17:25:55 +0800 |
| commit | 5c5a71428a93fb225f0057790f41697fe2a0df92 (patch) | |
| tree | 18d1a5214936c767e079e9be0864e9496db2b4ca /backend/lib/CodeGen | |
| parent | 0dc24902b4d01b939160946098a8a3bb404b9d73 (diff) | |
| download | rcc-project-5c5a71428a93fb225f0057790f41697fe2a0df92.tar.gz rcc-project-5c5a71428a93fb225f0057790f41697fe2a0df92.tar.xz | |
[CodeGen] Remove non-LLVM machine DCE placements
Diffstat (limited to 'backend/lib/CodeGen')
| -rw-r--r-- | backend/lib/CodeGen/MachineOptimizationPipeline.cpp | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/backend/lib/CodeGen/MachineOptimizationPipeline.cpp b/backend/lib/CodeGen/MachineOptimizationPipeline.cpp index f3ce86d..817b2ca 100644 --- a/backend/lib/CodeGen/MachineOptimizationPipeline.cpp +++ b/backend/lib/CodeGen/MachineOptimizationPipeline.cpp @@ -76,9 +76,6 @@ Expected<void> addPreRegisterAllocationOptimizationPipeline( MachineCombinerStage::PreRegisterAllocation); if (!Added) return std::unexpected(Added.error()); - Added = addPass<MachineDCEPass>(Pipeline); - if (!Added) - return std::unexpected(Added.error()); return addPass<MachineSchedulerPass>(Pipeline, TargetInfo.SchedulingModel); } @@ -105,9 +102,6 @@ addPostRegisterAllocationPipeline(MachineFunctionPassManager &Pipeline, Added = addPass<PrologueEpilogueInsertionPass>(Pipeline, TargetInfo.FrameLowering); if (!Added) return std::unexpected(Added.error()); - Added = addPass<MachineDCEPass>(Pipeline); - if (!Added) - return std::unexpected(Added.error()); Added = addPass<ExpandPostRAPseudosPass>(Pipeline, TargetInfo.PseudoExpansion); if (!Added) return std::unexpected(Added.error()); |