[RISCV] Consolidate instruction behavior in RISCVInstrInfo

7 files changed, 26 insertions, 29 deletions

diff --git a/backend/lib/CodeGen/MachineBranchOptimization.cpp b/backend/lib/CodeGen/MachineBranchOptimization.cpp
index 19127ea..df25a4a 100644
--- a/backend/lib/CodeGen/MachineBranchOptimization.cpp
+++ b/backend/lib/CodeGen/MachineBranchOptimization.cpp
@@ -142,7 +142,7 @@ namespace {
       if (!RemovedUnconditional)
         return std::unexpected(RemovedUnconditional.error());
     }
-    auto Inserted = Info.insertUnconditionalBranch(*Block, *Selected, Function, Target);
+    auto Inserted = Info.insertBranch(*Block, *Selected, Function, Target);
     if (!Inserted)
       return std::unexpected(Inserted.error());
 
@@ -269,8 +269,7 @@ namespace {
         } else {
           if (Predecessor->next() != Block)
             continue;
-          auto Inserted =
-              Info.insertUnconditionalBranch(*Predecessor, *Successor, Function, Target);
+          auto Inserted = Info.insertBranch(*Predecessor, *Successor, Function, Target);
           if (!Inserted)
             return std::unexpected(Inserted.error());
         }
diff --git a/backend/lib/CodeGen/MachineCopyPropagation.cpp b/backend/lib/CodeGen/MachineCopyPropagation.cpp
index f9211f9..60992a5 100644
--- a/backend/lib/CodeGen/MachineCopyPropagation.cpp
+++ b/backend/lib/CodeGen/MachineCopyPropagation.cpp
@@ -12,8 +12,8 @@
 #include "rcc/CodeGen/MachineOperand.h"
 #include "rcc/CodeGen/MachineRegisterInfo.h"
 #include "rcc/CodeGen/RegisterMask.h"
-#include "rcc/CodeGen/TargetCodeGen.h"
 #include "rcc/CodeGen/TargetDescription.h"
+#include "rcc/CodeGen/TargetInstrInfo.h"
 #include "rcc/CodeGen/TargetRegisterInfo.h"
 
 #include <algorithm>
@@ -127,7 +127,7 @@ struct CopyOperands final {
 [[nodiscard]] Expected<bool> propagateVirtualCopy(MachineInstr &Copy, const CopyOperands &Operands,
                                                   MachineFunction &Function,
                                                   const TargetDescription &Target,
-                                                  const TargetSSAInfo &Info) {
+                                                  const TargetInstrInfo &Info) {
   if (!Operands.Destination.isVirtual() || !Operands.Source.isVirtual())
     return false;
   if (Function.registerInfo().getUniqueVRegDef(Operands.Destination) !=
@@ -231,7 +231,7 @@ struct CopyOperands final {
 [[nodiscard]] Expected<bool> propagatePhysicalCopy(MachineInstr &Copy, const CopyOperands &Operands,
                                                    MachineFunction &Function,
                                                    const TargetDescription &Target,
-                                                   const TargetSSAInfo &Info) {
+                                                   const TargetInstrInfo &Info) {
   const std::optional<PhysicalRegister> Destination = Operands.Destination.physicalRegister();
   const std::optional<PhysicalRegister> Source = Operands.Source.physicalRegister();
   if (!Destination || !Source || Operands.DestinationOperand->subReg().value() != 0 ||
diff --git a/backend/lib/CodeGen/MachineFallthrough.cpp b/backend/lib/CodeGen/MachineFallthrough.cpp
index a853f96..e912f0b 100644
--- a/backend/lib/CodeGen/MachineFallthrough.cpp
+++ b/backend/lib/CodeGen/MachineFallthrough.cpp
@@ -83,8 +83,7 @@ normalizeFallthroughs(MachineFunction &Function, const TargetDescription &Target
       Changed = true;
     } else if (Analysis->Conditional != nullptr && Analysis->Unconditional == nullptr &&
                Analysis->FalseTarget != nullptr) {
-      auto Inserted =
-          Info.insertUnconditionalBranch(*Block, *Analysis->FalseTarget, Function, Target);
+      auto Inserted = Info.insertBranch(*Block, *Analysis->FalseTarget, Function, Target);
       if (!Inserted)
         return std::unexpected(Inserted.error());
       Changed = true;
@@ -102,7 +101,7 @@ normalizeFallthroughs(MachineFunction &Function, const TargetDescription &Target
         return makeUnexpected(ErrorCode::VerificationError,
                               "fallthrough normalization encountered a null successor");
       }
-      auto Inserted = Info.insertUnconditionalBranch(*Block, *Successor, Function, Target);
+      auto Inserted = Info.insertBranch(*Block, *Successor, Function, Target);
       if (!Inserted)
         return std::unexpected(Inserted.error());
       Changed = true;
diff --git a/backend/lib/CodeGen/MachineOptimizationPipeline.cpp b/backend/lib/CodeGen/MachineOptimizationPipeline.cpp
index 76dbd44..6d24034 100644
--- a/backend/lib/CodeGen/MachineOptimizationPipeline.cpp
+++ b/backend/lib/CodeGen/MachineOptimizationPipeline.cpp
@@ -69,10 +69,10 @@ addSelectedSSAOptimizationPipeline(MachinePassManager &Pipeline,
 
 Expected<void> addPreRegisterAllocationOptimizationPipeline(
     MachinePassManager &Pipeline, const MachineOptimizationPipelineTargetInfo &TargetInfo) {
-  auto Added = addPass<MachineBranchOptimizationPass>(Pipeline, TargetInfo.BranchInfo);
+  auto Added = addPass<MachineBranchOptimizationPass>(Pipeline, TargetInfo.InstrInfo);
   if (!Added)
     return std::unexpected(Added.error());
-  Added = addPass<MachineCopyPropagationPass>(Pipeline, TargetInfo.SSA,
+  Added = addPass<MachineCopyPropagationPass>(Pipeline, TargetInfo.InstrInfo,
                                               MachineCopyPropagationStage::PreRegisterAllocation);
   if (!Added)
     return std::unexpected(Added.error());
@@ -92,7 +92,7 @@ addPostRegisterAllocationPipeline(MachinePassManager &Pipeline,
   auto Added = addPass<MachineStackSlotColoringPass>(Pipeline);
   if (!Added)
     return std::unexpected(Added.error());
-  Added = addPass<MachineCopyPropagationPass>(Pipeline, TargetInfo.SSA,
+  Added = addPass<MachineCopyPropagationPass>(Pipeline, TargetInfo.InstrInfo,
                                               MachineCopyPropagationStage::PostRegisterAllocation);
   if (!Added)
     return std::unexpected(Added.error());
@@ -128,29 +128,29 @@ addPostRegisterAllocationPipeline(MachinePassManager &Pipeline,
   Added = addPass<PostRASchedulerPass>(Pipeline, TargetInfo.SchedulingModel);
   if (!Added)
     return std::unexpected(Added.error());
-  Added = addPass<MachineTailDuplicationPass>(Pipeline, TargetInfo.BranchInfo);
+  Added = addPass<MachineTailDuplicationPass>(Pipeline, TargetInfo.InstrInfo);
   if (!Added)
     return std::unexpected(Added.error());
-  Added = addPass<MachineTailMergePass>(Pipeline, TargetInfo.BranchInfo);
+  Added = addPass<MachineTailMergePass>(Pipeline, TargetInfo.InstrInfo);
   if (!Added)
     return std::unexpected(Added.error());
   Added = addPass<MachineBlockPlacementPass>(Pipeline);
   if (!Added)
     return std::unexpected(Added.error());
-  Added = addPass<MachineFallthroughPass>(Pipeline, TargetInfo.BranchInfo);
+  Added = addPass<MachineFallthroughPass>(Pipeline, TargetInfo.InstrInfo);
   if (!Added)
     return std::unexpected(Added.error());
-  Added = addPass<MachineBranchRelaxationPass>(Pipeline, TargetInfo.BranchInfo);
+  Added = addPass<MachineBranchRelaxationPass>(Pipeline, TargetInfo.InstrInfo);
   if (!Added)
     return std::unexpected(Added.error());
   Added = addPass<TargetLatePseudoExpansionPass>(Pipeline, TargetInfo.PseudoExpansion,
-                                                 TargetInfo.BranchInfo);
+                                                 TargetInfo.InstrInfo);
   if (!Added)
     return std::unexpected(Added.error());
   Added = addPass<FinalizeEmissionPseudosPass>(Pipeline);
   if (!Added)
     return std::unexpected(Added.error());
-  return addPass<FinalEncodabilityVerifierPass>(Pipeline, TargetInfo.BranchInfo);
+  return addPass<FinalEncodabilityVerifierPass>(Pipeline, TargetInfo.InstrInfo);
 }
 
 } // namespace rcc
diff --git a/backend/lib/CodeGen/MachineSSAExit.cpp b/backend/lib/CodeGen/MachineSSAExit.cpp
index 76963ea..ec10b3b 100644
--- a/backend/lib/CodeGen/MachineSSAExit.cpp
+++ b/backend/lib/CodeGen/MachineSSAExit.cpp
@@ -167,7 +167,7 @@ struct PhiPlan final {
 
 [[nodiscard]] Expected<MachineInstr *>
 buildCopy(MachineFunction &Function, const TargetDescription &Target,
-          const TargetSSAInfo &TargetInfo, MachineBasicBlock &Block, MachineInstr *Before,
+          const TargetInstrInfo &TargetInfo, MachineBasicBlock &Block, MachineInstr *Before,
           RegisterValue Destination, RegisterValue Source, const MachineInstr *DebugSource) {
   auto Legality = TargetInfo.validateCopy(Destination.Reg, Destination.SubReg, Source.Reg,
                                           Source.SubReg, Function, Target);
@@ -388,7 +388,7 @@ buildImplicitDef(MachineFunction &Function, const TargetDescription &Target,
 
 [[nodiscard]] Expected<MachineBasicBlock *>
 placePhiCopiesOnEdge(MachineFunction &Function, const TargetDescription &Target,
-                     const TargetSSAInfo &TargetInfo, MachineBasicBlock &From,
+                     const TargetInstrInfo &TargetInfo, MachineBasicBlock &From,
                      MachineBasicBlock &To,
                      std::unordered_map<EdgeKey, MachineBasicBlock *, EdgeKeyHash> &Cache,
                      MachinePassResult &PassResult) {
@@ -415,7 +415,7 @@ placePhiCopiesOnEdge(MachineFunction &Function, const TargetDescription &Target,
     if (!OtherFallthrough)
       return std::unexpected(OtherFallthrough.error());
     if (*OtherFallthrough) {
-      auto Branch = TargetInfo.insertUnconditionalBranch(*LayoutPredecessor, To, Function, Target);
+      auto Branch = TargetInfo.insertBranch(*LayoutPredecessor, To, Function, Target);
       if (!Branch)
         return std::unexpected(Branch.error());
       PassResult.Changed = true;
@@ -445,7 +445,7 @@ placePhiCopiesOnEdge(MachineFunction &Function, const TargetDescription &Target,
   auto LiveIns = copyLiveIns(To, *EdgeBlock);
   if (!LiveIns)
     return std::unexpected(LiveIns.error());
-  auto Branch = TargetInfo.insertUnconditionalBranch(*EdgeBlock, To, Function, Target);
+  auto Branch = TargetInfo.insertBranch(*EdgeBlock, To, Function, Target);
   if (!Branch)
     return std::unexpected(Branch.error());
 
@@ -526,7 +526,7 @@ placePhiCopiesOnEdge(MachineFunction &Function, const TargetDescription &Target,
 
 [[nodiscard]] Expected<void> expandRegSequence(MachineInstr &Instruction, MachineFunction &Function,
                                                const TargetDescription &Target,
-                                               const TargetSSAInfo &TargetInfo) {
+                                               const TargetInstrInfo &TargetInfo) {
   if (Instruction.operandCount() < 3 || (Instruction.operandCount() - 1U) % 2U != 0) {
     return makeUnexpected(ErrorCode::VerificationError,
                           "REG_SEQUENCE requires a destination and source/subregister pairs");
@@ -588,7 +588,7 @@ placePhiCopiesOnEdge(MachineFunction &Function, const TargetDescription &Target,
 [[nodiscard]] Expected<void> expandInsertSubreg(MachineInstr &Instruction,
                                                 MachineFunction &Function,
                                                 const TargetDescription &Target,
-                                                const TargetSSAInfo &TargetInfo) {
+                                                const TargetInstrInfo &TargetInfo) {
   if (Instruction.operandCount() != 4) {
     return makeUnexpected(ErrorCode::VerificationError,
                           "INSERT_SUBREG requires destination, base, inserted value, and index");
@@ -792,7 +792,7 @@ Expected<MachinePassResult> PHIEliminationPass::run(MachineFunction &Function,
                                                     MachineAnalysisManager &Analyses) {
   if (Info == nullptr) {
     return makeUnexpected(ErrorCode::InvalidArgument,
-                          "PHI elimination has no target SSA behavior interface");
+                          "PHI elimination has no target instruction information");
   }
   auto Required = requireProperties(Function, contract());
   if (!Required)
@@ -927,7 +927,7 @@ Expected<MachinePassResult> TwoAddressRewritePass::run(MachineFunction &Function
                                                        MachineAnalysisManager &Analyses) {
   if (Info == nullptr) {
     return makeUnexpected(ErrorCode::InvalidArgument,
-                          "two-address rewrite has no target SSA behavior interface");
+                          "two-address rewrite has no target instruction information");
   }
   auto Required = requireProperties(Function, contract());
   if (!Required)
diff --git a/backend/lib/CodeGen/MachineTailDuplication.cpp b/backend/lib/CodeGen/MachineTailDuplication.cpp
index a4b31b2..80c58c9 100644
--- a/backend/lib/CodeGen/MachineTailDuplication.cpp
+++ b/backend/lib/CodeGen/MachineTailDuplication.cpp
@@ -230,8 +230,7 @@ duplicateTailIntoPredecessor(const TailCandidate &Candidate, MachineBasicBlock &
     if (!Removed)
       return std::unexpected(Removed.error());
   }
-  auto NewBranch =
-      Info.insertUnconditionalBranch(Predecessor, *Candidate.Successor, Function, Target);
+  auto NewBranch = Info.insertBranch(Predecessor, *Candidate.Successor, Function, Target);
   if (!NewBranch)
     return std::unexpected(NewBranch.error());
   MachineCFGUpdater CFG = Function.cfgUpdater();
diff --git a/backend/lib/CodeGen/MachineTailMerge.cpp b/backend/lib/CodeGen/MachineTailMerge.cpp
index c8aad80..07608cc 100644
--- a/backend/lib/CodeGen/MachineTailMerge.cpp
+++ b/backend/lib/CodeGen/MachineTailMerge.cpp
@@ -279,7 +279,7 @@ redirectPredecessor(MachineBasicBlock &Predecessor, MachineBasicBlock &Duplicate
          Analysis->FalseTarget == &Duplicate);
     if (!IsImplicitEdge)
       return false;
-    auto Inserted = Info.insertUnconditionalBranch(Predecessor, Canonical, Function, Target);
+    auto Inserted = Info.insertBranch(Predecessor, Canonical, Function, Target);
     if (!Inserted)
       return std::unexpected(Inserted.error());
   }